JAJSKP2E august 2020 – august 2023 TPS37-Q1
PRODUCTION DATA
VDD operating voltage ranges from 2.7 V to 65 V. An input supply capacitor is not required for this device; however, if the input supply is noisy good analog practice is to place a 0.1 µF capacitor between the VDD and GND.
VDD needs to be at or above VDD(MIN) for at least the start-up time delay (tSD) for the device to be fully functional.
VDD voltage is independent of VSENSE and VRESET, meaning that VDD can be higher or lower than the other pins.