JAJSLG9B
March 2021 – November 2023
TPS3704-Q1
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Device Nomenclature
5
Pin Configuration and Functions
6
Specifications
6.1
絶対最大定格
6.2
ESD 定格
6.3
推奨動作条件
6.4
Thermal Information
6.5
電気的特性
6.6
タイミング要件
6.7
Timing Diagrams
6.8
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagrams
7.3
Feature Description
7.3.1
VDD
7.3.2
SENSEx Input
7.3.2.1
Immunity to SENSEx Pins Voltage Transients
7.3.2.1.1
SENSEx Hysteresis
7.3.3
RESETx/RESETx
7.4
Device Functional Modes
7.4.1
Normal Operation (VDD > VDD(MIN))
7.4.2
Undervoltage Lockout (VPOR < VDD < UVLO)
7.4.3
Power-On Reset (VDD < VPOR)
8
Application and Implementation
8.1
Application Information
8.1.1
Voltage Threshold Accuracy
8.1.2
Adjustable Voltage Thresholds
8.2
Typical Applications
8.2.1
Design 1: Multi-Rail Window Monitoring for Microcontroller Power Rails
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.2
Design 2: Manual Self-Test Option for Enhanced Functional Safety Use Cases
8.2.2.1
Design Requirements
8.2.2.2
Detailed Design Procedure
8.2.3
Application Curves
8.3
Power Supply Recommendations
8.3.1
Power Supply Guidelines
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Device Nomenclature
9.2
ドキュメントの更新通知を受け取る方法
9.3
サポート・リソース
9.4
Trademarks
9.5
静電気放電に関する注意事項
9.6
用語集
10
Revision History
11
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DDF|8
MPDS569D
サーマルパッド・メカニカル・データ
発注情報
jajslg9b_oa
jajslg9b_pm
8.3
Power Supply Recommendations