JAJSK33A April   2022  – September 2023 TPS38

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Revision History
  6. Device Comparison
  7. Pin Configuration and Functions
    1.     8
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Timing Diagrams
    8. 7.8 Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Voltage (VDD)
        1. 8.3.1.1 Undervoltage Lockout (VPOR < VDD < UVLO)
        2. 8.3.1.2 Power-On Reset (VDD < VPOR )
      2. 8.3.2 SENSE
        1. 8.3.2.1 SENSE Hysteresis
      3. 8.3.3 Output Logic Configurations
        1. 8.3.3.1 Open-Drain
        2. 8.3.3.2 Push-Pull
        3. 8.3.3.3 Active-High (RESET)
        4. 8.3.3.4 Active-Low (RESET)
      4. 8.3.4 User-Programmable Reset Time Delay
        1. 8.3.4.1 Reset Time Delay Configuration
      5. 8.3.5 User-Programmable Sense Delay
        1. 8.3.5.1 Sense Time Delay Configuration
      6. 8.3.6 Manual RESET (CTR1 / MR) and (CTR2 / MR) Input
      7. 8.3.7 Adjustable Voltage Thresholds
    4. 8.4 Device Functional Modes
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 High Voltage – Fast AC Signal Monitoring For Power Fault Detection
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Power Dissipation and Device Operation
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
      3. 9.4.3 Creepage Distance
  11. 10Device and Documentation Support
    1. 10.1 Device Nomenclature
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Detailed Design Procedure

The main advantage of this unique application is being able to monitor a single AC source with a known operating frequency power rail. Because the TPS38 is a dual input undervoltage detector with delay function, detecting faults either from a change of operating frequency range or voltage amplitude of the AC source is achievable.

Figure 9-2 illustrates an example of how the TPS38 is monitoring an AC source. Input to SENSE1 of TPS38 is monitoring a full wave rectifier DC signal. The DC signal is the result from the rectification of the 24 VAC source and monitors the AC source for undervoltage events due to a change of voltage amplitude or a decrease to operating frequency. Input to SENSE2 of TPS38 will monitor the AC source by using a "resistive-drop" supply topology circuit. The unique circuit resistively divides the AC voltage signal and provides only the positive half wave Figure 9-2 into SENSE2 input. The half wave signal does not go through any output filter and hence any change to the AC voltage or operating frequency can be rapidly detected. Knowing the operating frequency of the AC source and converting to the time domain, the TPS38 SENSE2 delay can be programmed, by the capacitor on CTS2 pin, to equal or be greater than one-half of the operating period (the frequency of the half wave rectification signal) or the half cycle shown in Figure 9-2. When the half wave voltage amplitude falls below the SENSE2 threshold voltage, the SENSE2 time delay counter begins to increment. If the next half wave voltage amplitude exceeds the SENSE2 threshold voltage, the SENSE2 time delay counter will reset and the TPS38 RESET2 pin will indicate no fault was detected. Conversely, if the voltage amplitude of the half wave does not reach the SENSE2 threshold voltage within the programmed time delay of tCTS, a fault will occur. Also, a fault can occur if the operating frequency from the AC source decreases, resulting in lower AC voltage amplitude at the programmed time delay tCTS.

GUID-20201002-CA0I-QJB1-HC8W-Z0MJFNNGM7W9-low.svg Figure 9-2 Design 2 Timing Diagram

The TPS38, with its ability of having a wide VDD range from 2.7V to 65V and dual input undervoltage detection, offers a unique AC power rail monitoring solution. Combining SENSE delay feature with the "resistive-drop" supply circuitry, detecting an undervoltage event on the half cycle of the AC power rail provides a fast power fault response. Also, the TPS38 provides an undervoltage monitoring and SENSE delay fault detection for the same AC power rail. With undervoltage supervision of the AC power rail, applications needing a specific operating DC range to protect its subsystems is achieve through TPS38. Good design practice recommends using a 0.1-µF capacitor on the VDD pin and this capacitance may need to increase if using an adjustable version with a resistor divider.

Note that this design solution is not isolated and one must take into account when planning to use in high power systems.

SENSE1 is configured to monitor UV on the DC rail. The CTS1 and CTR1 capacitor can be used to set different timing thresholds for fault trigger and fault recovery. Figure 9-3 and Figure 9-4 show the behavior of RESET1 based on the voltage on SENSE1.