JAJS349D August   1999  – December 2020

PRODUCTION DATA  

  1. 1特長
  2. 2アプリケーション
  3. 3概要
  4. 4Revision History
  5. 5Device Comparison
  6. 6Pin Configuration and Functions
  7. 7Specifications
    1. 7.1 Absolute Maximum Ratings (1) (1)
    2. 7.2 Recommended Operating Conditions
    3. 7.3 Dissipation Ratings
    4. 7.4 Electrical Characteristics
    5. 7.5 Timing Requirements
    6. 7.6 Switching Characteristics
    7. 7.7 Timing Diagram
    8. 7.8 Typical Characteristics
  8. 8Detailed Description
  9. 9静電気放電に関する注意事項

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Pin Configuration and Functions

GUID-FB0FE1B0-F934-436B-8056-A21731A613BD-low.gif Figure 6-1 Pin configuration
Table 6-1 Pin Functions
PIN I/O(1) DESCRIPTION
NAME NO.
GND 1 - This pin should be connected to ground with a low-impedance connection.
RESET 2 O RESET is an active low signal, asserting when VDD is below the threshold voltage. When VDD rises above VIT, there is a delay time (td) until RESET deasserts.
RESET is a push-pull output stage.
VDD 3 - Supply voltage pin. A 0.1-µF ceramic capacitor from this pin to ground is recommended to improve stability of the threshold voltage