JAJSGL5C December   2018  – August 2019 TPS3840

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーション回路
      2.      TPS3840 の標準的な消費電流
  4. 4 改訂履歴
  5. 5 概要 (続き)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
    1.     Pin Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Input Voltage (VDD)
        1. 9.3.1.1 VDD Hysteresis
        2. 9.3.1.2 VDD Transient Immunity
      2. 9.3.2 User-Programmable Reset Time Delay
      3. 9.3.3 Manual Reset (MR) Input
      4. 9.3.4 Output Logic
        1. 9.3.4.1 RESET Output, Active-Low
        2. 9.3.4.2 RESET Output, Active-High
    4. 9.4 Device Functional Modes
      1. 9.4.1 Normal Operation (VDD > VDD(min))
      2. 9.4.2 VDD Between VPOR and VDD(min)
      3. 9.4.3 Below Power-On-Reset (VDD < VPOR)
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design 1: Dual Rail Monitoring with Power-Up Sequencing
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
        3. 10.2.1.3 Application Curves
      2. 10.2.2 Design 2: Battery Voltage and Temperature Monitor
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
      3. 10.2.3 Design 3: Fast Start Undervoltage Supervisor with Level-shifted Input
        1. 10.2.3.1 Design Requirements
        2. 10.2.3.2 Detailed Design Procedure
      4. 10.2.4 Design 4: Voltage Monitor with Back-up Battery Switchover
        1. 10.2.4.1 Design Requirements
        2. 10.2.4.2 Detailed Design Procedure
      5. 10.2.5 Application Curve: TPS3840EVM
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 デバイスの項目表記
    2. 13.2 コミュニティ・リソース
    3. 13.3 商標
    4. 13.4 静電気放電に関する注意事項
    5. 13.5 Glossary
  14. 14メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

10.2.4.1 Design Requirements

This design requires voltage supervision on a 5-V main supply voltage rail and when the main rail fails, switch to a back-up battery supply to prevent complete power loss in the system. The System Output must remain above 1.8 V even when the main supply completely fails. The design requires less than 500 nA of total current consumption and must prevent battery leakage when the battery is not being used. When the system is using the back-up battery and the main supply voltage rail comes back up, the system must switch back to the main power supply in less than 100 µs to save battery power.

PARAMETER DESIGN REQUIREMENT DESIGN RESULT
Main Supply Voltage Supervision Monitor 5-V main supply for undervoltage condition. When main supply drops below 3 V, switch to back-up battery. TPS3840 provides voltage monitoring with 1% accuracy with device options available in 0.1 V variations. This design uses TPS3840PL30 to set the undervoltage trigger at 3 V.
Batck-up Battery Switchover When undervoltage occurs on the main supply voltage rail, switch to the back-up batter. When undervoltage occurs on the main supply rail, the PMOS switch closes allowing the back-up battery to connect to the system output. The diodes prevent reverse leakage and allow either power supply to connect to the system output.
Main Power Supply to Back-up Battery Switch Response Time No more than 50 µs to switch to the back-up battery when the main power supply falls to undervoltage condition. TPS3840 provides a propagation delay for VDD falling below the undervoltage threshold (tP_HL) of 50 µs maximum to meet the requirement.
Back-up Battery to Main Power Supply Switch Back Response Time Less than 100 µs when switching from back-up battery back to main power supply when undervoltage condition is removed. By leaving MR disconnected, the RESET delay is set to a maximum of 50 µs to meet the requirement.
Device Current Consumption 500 nA TPS3840 requires 350 nA (typical)
System Output Voltage System Output must remain above 1.8 V in all cases When the main 5-V rail is connected, the System Output will be the rail voltage minus a diode voltage drop so at least 3 V - 0.7 V ~ 2.3 V. When the voltage rail drops below 3 V, the back-up battery switches into the system and the System Output becomes the battery voltage minus a diode voltage drop so 3.3 V - 0.7 V ~ 2.6 V. The threshold at which the battery switches into the system directly depends on the TPS3840 variant chosen.