JAJS116J December   2003  – June 2022 TPS40054 , TPS40055 , TPS40057

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Conditions
    3. 6.3 Thermal Information
    4. 6.4 Electrical Characteristics
    5. 6.5 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Setting the Switching Frequency (Programming the Clock Oscillator)
      2. 7.3.2 Programming The Ramp Generator Circuit
      3. 7.3.3 UVLO Operation
      4. 7.3.4 BP5 and BP10 Internal Voltage Regulators
      5. 7.3.5 Programming Soft Start
      6. 7.3.6 Programming Current Limit
      7. 7.3.7 Synchronizing to an External Supply
      8. 7.3.8 Loop Compensation
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Selecting the Inductor Value
      2. 8.1.2 Calculating the Output Capacitance
      3. 8.1.3 Calculating the Boost and BP10 Bypass Capacitor
      4. 8.1.4 DV-DT Induced Turn-On
      5. 8.1.5 High-Side MOSFET Power Dissipation
      6. 8.1.6 Synchronous Rectifier MOSFET Power Dissipation
      7. 8.1.7 TPS4005x Power Dissipation
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Calculate Maximum and Minimum Duty Cycles
        2. 8.2.2.2  Select Switching Frequency
        3. 8.2.2.3  Select ΔI
        4. 8.2.2.4  Calculate the High-Side MOSFET Power Losses
        5. 8.2.2.5  Calculate Synchronous Rectifier Losses
        6. 8.2.2.6  Calculate the Inductor Value
        7. 8.2.2.7  Set the Switching Frequency
        8. 8.2.2.8  Program the Ramp Generator Circuit
        9. 8.2.2.9  Calculate the Output Capacitance (CO)
        10. 8.2.2.10 Calculate the Soft-Start Capacitor (CSS/SD)
        11. 8.2.2.11 Calculate the Current Limit Resistor (RILIM)
        12. 8.2.2.12 Calculate Loop Compensation Values
        13. 8.2.2.13 Calculate the Boost and BP10V Bypass Capacitance
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 MOSFET Packaging
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • PWP|16
サーマルパッド・メカニカル・データ
発注情報

7.3.6 Programming Current Limit

The TPS4005x uses a two-tier approach for overcurrent protection. The first tier is a pulse-by-pulse protection scheme. Current limit is implemented on the high-side MOSFET by sensing the voltage drop across the MOSFET when the gate is driven high. The MOSFET voltage is compared to the voltage dropped across a resistor connected from VIN pin to the ILIM pin when driven by a constant current sink. If the voltage drop across the MOSFET exceeds the voltage drop across the ILIM resistor, the switching pulse is immediately terminated. The MOSFET remains off until the next switching cycle is initiated.

The second tier consists of a fault counter. The fault counter is incremented on an overcurrent pulse and decremented on a clock cycle without an overcurrent pulse. When the counter reaches seven, a restart is issued and seven soft-start cycles are initiated. Both the upper and lower MOSFETs are turned off during this period. The counter is decremented on each soft-start cycle. When the counter is decremented to zero, the PWM is re-enabled. If the fault has been removed, the output starts up normally. If the output is still present, the counter counts seven overcurrent pulses and re-enters the second-tier fault mode. See Figure 7-4 for typical overcurrent protection waveforms.

The minimum current limit setpoint (IILIM) is calculated in Equation 7.

Equation 7. GUID-857B2965-79B7-495C-B0A2-A49BA92BFBFF-low.gif

where

  • ILOAD is the load current at start-up.
GUID-BCEF54D6-7052-4D2A-9411-39E69F2F5425-low.gifFigure 7-4 Typical Current Limit Protection Waveforms

The current limit programming resistor (RILIM) is calculated using Equation 8. Care must be taken in choosing the values used for VOS and ISINK in the equation. To ensure the output current at the overcurrent level, the minimum value of ISINK and the maximum value of VOS must be used. The main purpose is hard fault protection of the power switches.

Equation 8. GUID-1D76823C-97CD-4218-B1D0-A27EA09271B2-low.gif

where

  • ISINK is the current into the ILIM pin and is 8.5 μA, minimum.
  • IOC is the overcurrent setpoint, which is the DC output current plus one-half of the peak inductor current.
  • VOS is the overcurrent comparator offset and is –20 mV maximum.