SLVS753C February   2007  – November 2016 TPS40180

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Current Sensing and Overcurrent Detection
      2. 7.3.2 Hiccup Fault Recovery
      3. 7.3.3 Selecting Current Sense Network Components
      4. 7.3.4 PGOOD Functionality
      5. 7.3.5 Output Overvoltage and Undervoltage Protection
      6. 7.3.6 Overtemperature Protection
      7. 7.3.7 eTRIM™
      8. 7.3.8 Connections Between Controllers for Stacking
      9. 7.3.9 VSH Line in the Multiphase
    4. 7.4 Device Functional Modes
      1. 7.4.1 Tracking
    5. 7.5 Programming
      1. 7.5.1 Programming the Operating Frequency
      2. 7.5.2 Programming the Soft-Start Time
      3. 7.5.3 Using the Device for Clock Master/Slave Operation
      4. 7.5.4 Using the TPS40180 for Voltage Control Loop Master or Slave Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Single Output Synchronous Buck Converter
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Inductor Selection
          2. 8.2.1.2.2 Output Capacitor Selection
          3. 8.2.1.2.3 Input Capacitor Selection
          4. 8.2.1.2.4 MOSFET Selection
          5. 8.2.1.2.5 Peripheral Component Design
            1. 8.2.1.2.5.1  Switching Frequency Setting (RT)
            2. 8.2.1.2.5.2  Output Voltage Setting (FB)
            3. 8.2.1.2.5.3  Current Sensing Network Design (CS+, CS-)
            4. 8.2.1.2.5.4  Overcurrent Protection (ILIM)
            5. 8.2.1.2.5.5  VREG (PVCC)
            6. 8.2.1.2.5.6  BP5
            7. 8.2.1.2.5.7  Phase Select (PSEL)
            8. 8.2.1.2.5.8  VSHARE (VSH)
            9. 8.2.1.2.5.9  Powergood (PGOOD)
            10. 8.2.1.2.5.10 Undervoltage Lockout (UVLO)
            11. 8.2.1.2.5.11 Clock Synchronization (CLKIO)
            12. 8.2.1.2.5.12 Bootstrap Capacitor
            13. 8.2.1.2.5.13 Soft Start (SS)
            14. 8.2.1.2.5.14 Remote Sense
            15. 8.2.1.2.5.15 Feedback Compensator Design
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Simultaneous Tracking With TPS40180 Devices
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
      3. 8.2.3 2-Phase Single Output With TPS40180
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
          1. 8.2.3.2.1 Inductor Selection
          2. 8.2.3.2.2 Output Capacitor Selection
          3. 8.2.3.2.3 Input Capacitor Selection
          4. 8.2.3.2.4 Peripheral Component Design
            1. 8.2.3.2.4.1 PSEL Pin
            2. 8.2.3.2.4.2 CLKIO Pin
            3. 8.2.3.2.4.3 RT Pin
            4. 8.2.3.2.4.4 SS Pin
            5. 8.2.3.2.4.5 DIFFO Pin and FB Pin
            6. 8.2.3.2.4.6 COMP Pin
            7. 8.2.3.2.4.7 VSH Pin
            8. 8.2.3.2.4.8 Other Pins
        3. 8.2.3.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Power Stage
      2. 10.1.2 Device Peripheral
      3. 10.1.3 PowerPad Layout™
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Device Nomenclature
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

4 Revision History

Changes from B Revision (November 2007) to C Revision

  • Added Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information sectionGo