JAJSDD3B
June 2017 – January 2019
TPS53681
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
3.1
アプリケーション概略図
4
改訂履歴
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Supply: Currents, UVLO, and Power-On Reset
6.6
References: DAC and VREF
6.7
Voltage Sense: AVSP and BVSP, AVSN and BVSN
6.8
Telemetry
6.9
Input Current Sensing
6.10
Programmable Loadline Settings
6.11
Current Sense and Calibration
6.12
Logic Interface Pins: AVR_EN, AVR_RDY, BVR_EN, BVR_RDY, RESET, VR_FAULT, VR_HOT
6.13
I/O Timing
6.14
PMBus Address Setting
6.15
Overcurrent Limit Thresholds
6.16
Switching Frequency
6.17
Slew Rate Settings
6.18
Ramp Selections
6.19
Dynamic Integration and Undershoot Reduction
6.20
Boot Voltage and TMAX Settings
6.21
Protections: OVP and UVP
6.22
Protections: ATSEN and BTSEN Pin Voltage Levels and Fault
6.23
PWM: I/O Voltage and Current
6.24
Dynamic Phase Add and Drop
6.25
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Phase Interleaving and PWM Operation
7.3.1.1
Setting the Load-Line (DROOP)
7.3.1.2
Load Transitions
7.3.1.2.1
VID Table
7.3.1.3
Temperature and Fault Sensing
7.3.1.4
AutoBalance™ Current Sharing
7.3.1.5
Phase Configuration for Channel B
7.3.1.6
RESET Function
7.4
Device Functional Modes
7.5
Programming
7.5.1
PMBus Connections
7.5.2
PMBus Address Selection
7.5.3
Supported Commands
7.5.4
Commonly Used PMBus Commands
7.5.5
Voltage, Current, Power, and Temperature Readings
7.5.5.1
(88h) READ_VIN
Table 6.
READ_VIN Register Field Descriptions
7.5.5.2
(89h) READ_IIN
Table 7.
READ_IIN Register Field Descriptions
7.5.5.3
(8Bh) READ_VOUT
Table 8.
READ_VOUT Register Field Descriptions
7.5.5.4
(8Ch) READ_IOUT
Table 9.
READ_IOUT Register Field Descriptions
7.5.5.5
(8Dh) READ_TEMPERATURE_1
Table 10.
READ_TEMPERATURE_1 Register Field Descriptions
7.5.5.6
(96h) READ_POUT
Table 11.
READ_POUT Register Field Descriptions
7.5.5.7
(97h) READ_PIN
Table 12.
READ_PIN Register Field Descriptions
7.5.5.8
(D4h) MFR_SPECIFIC_04
Table 13.
MFR_SPECIFIC_04 Register Field Descriptions
7.5.6
Input Current Sense and Calibration
7.5.6.1
Measured Input Current Calibration
7.5.6.2
(DAh) MFR_SPECIFIC_10
Table 15.
MFR_SPECIFIC_10 Register Field Descriptions
7.5.6.3
(DCh) MFR_SPECIFIC_12
Table 17.
MFR_SPECIFIC_12 Register Field Descriptions
7.5.7
Output Current Sense and Calibration
7.5.7.1
Reading Individual Phase Currents
7.5.7.1.1
Reading Total Current
7.5.7.1.2
Calibrating Current Measurements
7.5.7.2
(38h) IOUT_CAL_GAIN
Table 20.
IOUT_CAL_GAIN Register Field Descriptions
7.5.7.3
(39h) IOUT_CAL_OFFSET
Table 22.
IOUT_CAL_OFFSET Register Field Descriptions
7.5.8
Output Voltage Margin Testing
7.5.8.1
(01h) OPERATION
Table 25.
OPERATION Register Field Descriptions
7.5.8.2
(21h) VOUT_COMMAND
Table 26.
VOUT_COMMAND Register Field Descriptions
7.5.8.3
(26h) VOUT_MARGIN_LOW
Table 27.
VOUT_MARGIN_LOW Register Field Descriptions
7.5.8.4
(25h) VOUT_MARGIN_HIGH
Table 28.
VOUT_MARGIN_HIGH Register Field Descriptions
7.5.9
Loop Compensation
7.5.9.1
(D7h) MFR_SPECIFIC_07
Table 29.
MFR_SPECIFIC_07 Register Field Descriptions
7.5.9.2
(28h) VOUT_DROOP
Table 34.
VOUT_DROOP Register Field Descriptions
7.5.10
Converter Protection and Response
7.5.11
Output Overvoltage Protection and Response
7.5.11.1
(40h) VOUT_OV_FAULT_LIMIT
Table 37.
VOUT_OV_FAULT_LIMIT Register Field Descriptions
7.5.11.2
(41h) VOUT_OV_FAULT_RESPONSE
Table 38.
VOUT_OV_FAULT_RESPONSE Register Field Descriptions
7.5.12
Maximum Allowed Output Voltage Setting
7.5.12.1
(24h) VOUT_MAX
Table 39.
VOUT_MAX Register Field Descriptions
7.5.13
Output Undervoltage Protection and Response
7.5.13.1
(44h) VOUT_UV_FAULT_LIMIT
Table 40.
VOUT_UV_FAULT_LIMIT Register Field Descriptions
7.5.13.2
(45h) VOUT_UV_FAULT_RESPONSE
Table 41.
VOUT_UV_FAULT_RESPONSE Register Field Descriptions
7.5.14
Minimum Allowed Output Voltage Setting
7.5.14.1
(2Bh) VOUT_MIN
Table 42.
VOUT_MIN Register Field Descriptions
7.5.15
Output Overcurrent Protection and Response
7.5.15.1
(46h) IOUT_OC_FAULT_LIMIT
Table 43.
IOUT_OC_FAULT_LIMIT Register Field Descriptions
7.5.15.2
(4Ah) IOUT_OC_WARN_LIMIT
Table 44.
IOUT_OC_WARN_LIMIT Register Field Descriptions
7.5.15.3
(47h) IOUT_OC_FAULT_RESPONSE
Table 45.
IOUT_OC_FAULT_RESPONSE Register Field Descriptions
7.5.16
Input Under-Voltage Lockout (UVLO)
7.5.16.1
(35h) VIN_ON
Table 46.
VIN_ON Register Field Descriptions
7.5.17
Input Over-Voltage Protection and Response
7.5.17.1
(55h) VIN_OV_FAULT_LIMIT
Table 48.
VIN_OV_FAULT_LIMIT Register Field Descriptions
7.5.17.2
(56h) VIN_OV_FAULT_RESPONSE
Table 49.
VIN_OV_FAULT_RESPONSE Register Field Descriptions
7.5.18
Input Undervoltage Protection and Response
7.5.18.1
(59h) VIN_UV_FAULT_LIMIT
Table 50.
VIN_UV_FAULT_LIMIT Register Field Descriptions
7.5.18.2
(5Ah) VIN_UV_FAULT_RESPONSE
Table 52.
VIN_UV_FAULT_RESPONSE Register Field Descriptions
7.5.19
Input Overcurrent Protection and Response
7.5.19.1
(5Bh) IIN_OC_FAULT_LIMIT
Table 53.
IIN_OC_FAULT_LIMIT Register Field Descriptions
7.5.19.2
(5Dh) IIN_OC_WARN_LIMIT
Table 55.
IIN_OC_FAULT_LIMIT Register Field Descriptions
7.5.19.3
(5Ch) IIN_OC_FAULT_RESPONSE
Table 57.
IIN_OC_FAULT_LIMIT Register Field Descriptions
7.5.20
Over-Temperature Protection and Response
7.5.20.1
(4Fh) OT_FAULT_LIMIT
Table 58.
OT_FAULT_LIMIT Register Field Descriptions
7.5.20.2
(51h) OT_WARN_LIMIT
Table 59.
OT_WARN_LIMIT Register Field Descriptions
7.5.20.3
(50h) OT_FAULT_RESPONSE
Table 60.
OT_FAULT_RESPONSE Register Field Descriptions
7.5.21
Dynamic Phase Shedding (DPS)
7.5.21.1
(DEh) MFR_SPECIFIC_14
Table 61.
MFR_SPECIFIC_14 Register Field Descriptions
7.5.21.2
(DFh) MFR_SPECIFIC_15
Table 63.
MFR_SPECIFIC_15 Register Field Descriptions
7.5.22
NVM Programming
7.5.23
NVM Security
7.5.23.1
(FAh) MFR_SPECIFIC_42
Table 64.
MFR_SPECIFIC_42 Register Field Descriptions
7.5.24
Black Box Recording
7.5.24.1
(D8h) MFR_SPECIFIC_08
Table 65.
MFR_SPECIFIC_08 Register Field Descriptions
7.5.25
Board Identification and Inventory Tracking
7.5.25.1
(9Ah) MFR_MODEL
Table 67.
MFR_MODEL Register Field Descriptions
7.5.25.2
(9Bh) MFR_REVISION
Table 68.
MFR_REVISION Register Field Descriptions
7.5.25.3
(9Dh) MFR_DATE
Table 69.
MFR_DATE Register Field Descriptions
7.5.26
Status Reporting
7.5.26.1
(78h) STATUS_BYTE
Table 70.
STATUS_BYTE Register Field Descriptions
7.5.26.2
(79h) STATUS_WORD
Table 71.
STATUS_WORD Register Field Descriptions
7.5.26.3
(7Ah) STATUS_VOUT
Table 72.
STATUS_VOUT Register Field Descriptions
7.5.26.4
(7Bh) STATUS_IOUT
Table 73.
STATUS_IOUT Register Field Descriptions
7.5.26.5
(7Ch) STATUS_INPUT
Table 74.
STATUS_INPUT Register Field Descriptions
7.5.26.6
(7Dh) STATUS_TEMPERATURE
Table 75.
STATUS_TEMPERATURE Register Field Descriptions
7.5.26.7
(7Eh) STATUS_CML
Table 76.
STATUS_CML Register Field Descriptions
7.5.26.8
(80h) STATUS_MFR_SPECIFIC
Table 77.
STATUS_MFR_SPECIFIC Register Field Descriptions
8
Applications, Implementation, and Layout
8.1
Application Information
8.2
Typical Application
8.2.1
6-phase, 0.9-V, 300-A Application and 2-phase 0.8-V, 90-A Application
8.2.1.1
Schematic
8.2.1.2
Design Requirements
8.2.1.3
Detailed Design Procedure
8.2.1.3.1
Choose Inductor
8.2.1.3.2
Select the Per-Phase Valley Current Limit
8.2.1.3.3
Set the Maximum Temperature Level (TMAX)
8.2.1.3.4
Set USR Thresholds to Improve Load Transient Performance
8.2.1.4
Inductor DCR and Shunt Current Sensing Design for Input Power
8.2.1.4.1
Compensation Design
8.2.1.4.2
Set PMBus Addresses
8.2.1.5
Application Performance Plots
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.1.1
Device Guidelines
10.1.2
Power Stage Guidelines
10.2
Layout Examples
11
デバイスおよびドキュメントのサポート
11.1
ドキュメントの更新通知を受け取る方法
11.2
コミュニティ・リソース
11.3
商標
11.4
静電気放電に関する注意事項
11.5
Glossary
12
メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RSB|40
MPQF185C
サーマルパッド・メカニカル・データ
RSB|40
QFND255H
発注情報
jajsdd3b_oa
jajsdd3b_pm
7.3
Feature Description