JAJSL80A February   2021  – March 2021 TPS541620

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed-Frequency, Internally Compensated Advanced-Current-Mode Control
      2. 7.3.2  Enable and UVLO
      3. 7.3.3  Internal LDO
      4. 7.3.4  Pre-biased Output Start-up
      5. 7.3.5  Current Sharing
      6. 7.3.6  Frequency Selection and Minimum On-Time and Off-Time
      7. 7.3.7  Ramp Compensation Selection
      8. 7.3.8  Soft Start
      9. 7.3.9  Remote Sense Function
      10. 7.3.10 Adjustable Output Voltage
      11. 7.3.11 Power Good
      12. 7.3.12 Overcurrent Protection
      13. 7.3.13 Overvoltage and Undervoltage Protection
      14. 7.3.14 Overtemperature Protection
      15. 7.3.15 Frequency Synchronization
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application - Dual Independent Outputs
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Switching Frequency
        2. 8.2.2.2  Output Inductor Selection
        3. 8.2.2.3  Output Capacitor
        4. 8.2.2.4  Input Capacitor
        5. 8.2.2.5  Output Voltage Resistors Selection
        6. 8.2.2.6  Adjustable Undervoltage Lockout
        7. 8.2.2.7  Bootstrap Capacitor Selection
        8. 8.2.2.8  BP5 Capacitor Selection
        9. 8.2.2.9  PGOOD Pullup Resistor
        10. 8.2.2.10 Current Limit
        11. 8.2.2.11 Soft-Start Time Selection
        12. 8.2.2.12 MODE1 and MODE2 Pins
      3. 8.2.3 Application Curves
      4. 8.2.4 Typical Application - 2-Phase Operation
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Detailed Design Procedure
          1. 8.2.4.2.1  Switching Frequency
          2. 8.2.4.2.2  Output Inductor Selection
          3. 8.2.4.2.3  Output Capacitor
          4. 8.2.4.2.4  Input Capacitor
          5. 8.2.4.2.5  Output Voltage Resistors Selection
          6. 8.2.4.2.6  Adjustable Undervoltage Lockout
          7. 8.2.4.2.7  Bootstrap Capacitor Selection
          8. 8.2.4.2.8  BP5 Capacitor Selection
          9. 8.2.4.2.9  PGOOD Pullup Resistor
          10. 8.2.4.2.10 Current Limit
          11. 8.2.4.2.11 Soft-Start Time Selection
          12. 8.2.4.2.12 MODE1 Pin
        3. 8.2.4.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
      1. 10.2.1 Thermal Performance
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3.7 Ramp Compensation Selection

Internal ramp voltage is generated from an internal current source charging a capacitor. The current source charges the capacitor with a slope of (VIN-VOUT)/L and discharges with a slope of (VOUT/L) to emulate the inductor ripple current. This ramp is then fed back for control loop regulation and optimization according to required output power stage, duty ratio, and switching frequency. Internal ramp amplitude is set by selecting the appropriate ramp capacitor value. There are four ramp capacitor values available to the user:

  • 1.5 pF
  • 2.5 pF
  • 4 pF
  • 6 pF
These can be selected through the MODE pins. For the best performance, TI recommendeds using 1.5 pF for output voltage less or equal to 4 V. For output voltage higher than 4 V, use 2.5 pF. In some cases, a feedforward capacitor in parallel with a top-side feedback resistor is recommended to boost phase margin. Refer to TI application note SLVA289 for details. It is a good practice to have a placeholder for the feedforward capacitor on the board and only populate it when needed.

Connecting the pin-strapping resistor from MODE2 to ground selects the ramp capacitor value along with other functions. The MODE2 pin is also used to set the desired switching frequency. Every switching frequency opnion (FSW) has four ramp capacitor values to allow you to tune the transient performance. Table 7-1 shows the pin-strapping resistor options for switching frequency and internal ramp capacitor. For dual-output mode operation, which includes an application with two one-phase outputs, MODE1 provides the selection of the internal ramp capacitor for VOUT2 as shown in Table 7-3. VOUT1 ramp is set by MODE2 as shown in Table 7-1.

Table 7-1 MODE2 Pin-Strap Configuration
RESISTOR FROM MODE2 TO AGND (kΩ)FREQUENCY (kHz)RAMP CAPACITOR VALUE FOR VOUT1 (pF)
10.75001.5
12.12.5
13.74
15.46
17.410001.5
19.62.5
22.14
24.96
28.715001.5
33.22.5
38.34
45.36
53.620001.5
64.92.5
78.74
1006