JAJS448D
March 2010 – October 2018
TPS54260
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
Device Images
概略回路図
効率と負荷電流との関係
4
改訂履歴
5
概要(続き)
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Fixed Frequency PWM Control
8.3.2
Slope Compensation Output Current
8.3.3
Pulse-Skip Eco-Mode
8.3.4
Low-Dropout Operation and Bootstrap Voltage (BOOT)
8.3.5
Error Amplifier
8.3.6
Voltage Reference
8.3.7
Adjusting the Output Voltage
8.3.8
Enable and Adjusting Undervoltage Lockout
8.3.9
Slow-Start / Tracking Pin (SS/TR)
8.3.10
Overload Recovery Circuit
8.3.11
Sequencing
8.3.12
Constant Switching Frequency and Timing Resistor (RT/CLK Pin)
8.3.13
Overcurrent Protection and Frequency Shift
8.3.14
Selecting the Switching Frequency
8.3.15
How to Interface to RT/CLK Pin
8.3.16
Powergood (PWRGD Pin)
8.3.17
Overvoltage Transient Protection
8.3.18
Thermal Shutdown
8.3.19
Small Signal Model for Loop Response
8.3.20
Simple Small Signal Model for Peak Current Mode Control
8.3.21
Small Signal Model for Frequency Compensation
8.4
Device Functional Modes
8.4.1
Operation Near Minimum Input Voltage
8.4.2
Operation With Enable Control
9
Application and Implementation
9.1
Application Information
9.2
Typical Applications
9.2.1
3.3-V Output Application
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.2.1
Custom Design With WEBENCH® Tools
9.2.1.2.2
Selecting the Switching Frequency
9.2.1.2.3
Output Inductor Selection (LO)
9.2.1.2.4
Output Capacitor
9.2.1.2.5
Catch Diode
9.2.1.2.6
Input Capacitor
9.2.1.2.7
Slow-Start Capacitor
9.2.1.2.8
Bootstrap Capacitor Selection
9.2.1.2.9
Undervoltage Lock Out Set Point
9.2.1.2.10
Output Voltage and Feedback Resistors Selection
9.2.1.2.11
Compensation
9.2.1.2.12
Discontinuous Mode and Eco-Mode Boundary
9.2.1.2.13
Power Dissipation Estimate
9.2.1.3
Application Curves
9.2.2
Inverting Power Supply
9.2.3
Split-Rail Power Supply
9.2.4
12-V to 3.8-V GSM Power Supply
9.2.5
24-V to 4.2-V GSM Power Supply
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
デバイスおよびドキュメントのサポート
12.1
デバイス・サポート
12.1.1
デベロッパー・ネットワークの製品に関する免責事項
12.1.2
開発サポート
12.1.2.1
WEBENCH®ツールによるカスタム設計
12.2
ドキュメントの更新通知を受け取る方法
12.3
コミュニティ・リソース
12.4
商標
12.5
静電気放電に関する注意事項
12.6
Glossary
13
メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DGQ|10
MPDS043F
DRC|10
MPDS117L
サーマルパッド・メカニカル・データ
DGQ|10
PPTD325B
DRC|10
QFND013N
発注情報
jajs448d_oa
jajs448d_pm
7.6
Typical Characteristics
V
I
= 12 V
Figure 1.
On Resistance vs Junction Temperature
V
I
= 12 V
Figure 3.
Switch Current Limit vs Junction Temperature
V
I
= 12 V
T
J
= 25°C
Figure 5.
Switching Frequency vs RT/CLK Resistance High-Frequency Range
Figure 7.
EA Transconductance During Slow-Start vs Junction Temperature
V
I
= 12 V
Figure 9.
EN Pin Voltage vs Junction Temperature
V
I
= 12 V
V
I(EN)
= Theshold – 50 mV
Figure 11.
EN Pin Current vs Junction Temperature
Figure 13.
SS/TR Discharge Current vs Junction Temperature
V
I
= 12 V
Figure 15.
Shutdown Supply Current vs Junction Temperature
Figure 17.
VIN Supply Current vs Junction Temperature
V
I
= 12 V
Figure 19.
PWRGD On Resistance vs Junction Temperature
Figure 21.
BOOT-PH UVLO vs Junction Temperature
Figure 23.
SS/TR to VSENSE Offset vs VSENSE
V
I
= 12 V
Figure 2.
Voltage Reference vs Junction Temperature
V
I
= 12 V
RT = 200 kΩ
Figure 4.
Switching Frequency vs Junction Temperature
V
I
= 12 V
T
J
= 25°C
Figure 6.
Switching Frequency vs RT/CLK Resistance Low-Frequency Range
Figure 8.
EA Transconductance vs Junction Temperature
V
I
= 12 V
V
I(EN)
= Theshold + 50 mV
Figure 10.
EN Pin Current vs Junction Temperature
V
I
= 12 V
Figure 12.
SS/TR Charge Current vs Junction Temperature
V
I
= 12 V
T
J
= 25°C
Figure 14.
Switching Frequency vs VSENSE
T
J
= 25°C
Figure 16.
Shutdown Supply Current vs Input Voltage (V
in
)
Figure 18.
VIN Supply Current vs Input Voltage
V
I
= 12 V
Figure 20.
PWRGD Threshold vs Junction Temperature
Figure 22.
Input Voltage (UVLO) vs Junction Temperature
Figure 24.
SS/TR to VSENSE Offset vs Temperature