JAJS472C August   2010  – April 2018 TPS54320

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
      2.      効率と負荷電流との関係
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed Frequency PWM Control
      2. 7.3.2  Continuous Current Mode Operation (CCM)
      3. 7.3.3  VIN and Power VIN Pins (VIN and PVIN)
      4. 7.3.4  Voltage Reference
      5. 7.3.5  Adjusting the Output Voltage
      6. 7.3.6  Safe Start-up into Prebiased Outputs
      7. 7.3.7  Error Amplifier
      8. 7.3.8  Slope Compensation
      9. 7.3.9  Enable and Adjusting UVLO
      10. 7.3.10 Slow Start (SS/TR)
      11. 7.3.11 Power Good (PWRGD)
      12. 7.3.12 Bootstrap Voltage (BOOT) and Low Dropout Operation
      13. 7.3.13 Sequencing (SS/TR)
      14. 7.3.14 Output Overvoltage Protection (OVP)
      15. 7.3.15 Overcurrent Protection
        1. 7.3.15.1 High-Side MOSFET Overcurrent Protection
        2. 7.3.15.2 Low-Side MOSFET Overcurrent Protection
      16. 7.3.16 Thermal Shutdown
      17. 7.3.17 Small Signal Model for Loop Response
      18. 7.3.18 Simple Small Signal Model for Peak Current Mode Control
      19. 7.3.19 Small Signal Model for Frequency Compensation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Adjustable Switching Frequency and Synchronization (RT/CLK)
      2. 7.4.2 Adjustable Switching Frequency (RT Mode)
      3. 7.4.3 Synchronization (CLK Mode)
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design With WEBENCH® Tools
        2. 8.2.2.2  Operating Frequency
        3. 8.2.2.3  Output Inductor Selection
        4. 8.2.2.4  Output Capacitor Selection
        5. 8.2.2.5  Input Capacitor Selection
        6. 8.2.2.6  Slow-Start Capacitor Selection
        7. 8.2.2.7  Bootstrap Capacitor Selection
        8. 8.2.2.8  UVLO Set Point
        9. 8.2.2.9  Output Voltage Feedback Resistor Selection
          1. 8.2.2.9.1 Minimum Output Voltage
        10. 8.2.2.10 Compensation Component Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 WEBENCH®ツールによるカスタム設計
    2. 11.2 ドキュメントのサポート
    3. 11.3 商標
    4. 11.4 静電気放電に関する注意事項
    5. 11.5 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.5 Electrical Characteristics

TJ= –40°C to 150°C, VIN = 4.5 to 17 V, PVIN = 1.6 to 17 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY VOLTAGE (VIN AND PVIN PINS)
PVIN operating input voltage 1.6 17 V
VIN operating input voltage 4.5 17 V
VIN internal UVLO threshold VIN rising 4.0 4.5 V
VIN internal UVLO hysteresis 150 mV
VIN shutdown supply Current EN = 0 V 2 5 μA
VIN operating – non switching supply current VSENSE = 810 mV 600 800 μA
ENABLE AND UVLO (EN PIN)
Enable threshold Rising 1.21 1.26 V
Enable threshold Falling 1.10 1.17 V
EN pin sourcing current EN low EN = 1.1 V 1.15 μA
EN pin sourcing current EN high EN = 1.3 V 3.4 μA
VOLTAGE REFERENCE
Voltage reference 0 A ≤ IOUT ≤ 3 A 0.792 0.800 0.808 V
MOSFET
High-side switch resistance(1) BOOT-PH = 3 V 77 116 mΩ
High-side switch resistance(1) BOOT-PH = 6 V 57 103 mΩ
Low-side Switch Resistance(1) VIN = 12 V 50 87 mΩ
ERROR AMPLIFIER
Error amplifier Transconductance (gm) –2 μA < I(COMP)< 2 μA, V(COMP) = 1 V 1300 μMhos
Error amplifier dc gain VSENSE = 0.8 V 1000 3100 V/V
Error amplifier source/sink V(COMP) = 1 V, 100-mV input overdrive ±110 μA
Start switching threshold 0.25 V
COMP to Iswitch gm 12 A/V
CURRENT LIMIT
High-side switch current limit threshold 4.2 6.2 A
Low-side switch sourcing current limit 3.8 5.8 A
Low-side switch sinking current limit 1 2.6 A
Hiccup wait time before triggering hiccup 512 cycles
Hiccup time before restart 16384 cycles
THERMAL SHUTDOWN
Thermal shutdown 160 175 °C
Thermal shutdown hysteresis 10 °C
TIMING RESISTOR AND EXTERNAL CLOCK (RT/CLK PIN)
Minimum switching frequency Rrt = 240 kΩ (1%) 160 200 240 kHz
Switching frequency Rrt = 100 kΩ (1%) 400 480 560 kHz
Maximum switching frequency Rrt = 40.2 kΩ (1%) 1080 1200 1320 kHz
Minimum pulse width 20 ns
RT/CLK high threshold 2 V
RT/CLK low threshold 0.8 V
RT/CLK falling edge to PH rising edge delay Measure at 500 kHz with RT resistor in series 62 ns
Switching frequency range (RT mode set point and PLL mode) 200 1200 kHz
PH (PH PIN)
Minimum on time Measured at 90% to 90% of PH,
TA = 25°C, IPH = 2 A		 97 135 ns
Minimum off time BOOT-PH ≥ 3 V 0 ns
BOOT (BOOT PIN)
BOOT-PH UVLO 2.1 3 V
SLOW START AND TRACKING (SS/TR PIN)
SS charge current 2.3 μA
SS/TR to VSENSE matching V(SS/TR) = 0.4 V 29 60 mV
POWER GOOD (PWRGD PIN)
VSENSE threshold VSENSE falling (Fault) 91 % Vref
VSENSE rising (Good) 94 % Vref
VSENSE rising (Fault) 109 % Vref
VSENSE falling (Good) 106 % Vref
Output high leakage VSENSE = Vref, V(PWRGD) = 5.5 V 30 100 nA
Output low I(PWRGD) = 2 mA 0.3 V
Minimum VIN for valid output V(PWRGD)< 0.5V at 100 μA 0.6 1 V
Minimum SS/TR voltage for PWRGD valid 1.2 1.4 V
(1) Measured at pins