JAJSC29D November   2014  – February 2016 TPS54335-1A , TPS54335A , TPS54336A

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed-Frequency PWM Control
      2. 7.3.2  Light-Load Operation
      3. 7.3.3  Voltage Reference
      4. 7.3.4  Adjusting the Output Voltage
      5. 7.3.5  Enabling and Adjusting Undervoltage Lockout
      6. 7.3.6  Error Amplifier
      7. 7.3.7  Slope Compensation and Output Current
      8. 7.3.8  Safe Startup into Pre-Biased Outputs
      9. 7.3.9  Bootstrap Voltage (BOOT)
      10. 7.3.10 Adjustable Switching Frequency (TPS54335A Only)
      11. 7.3.11 Soft-Start (TPS54336A Only)
      12. 7.3.12 Output Overvoltage Protection (OVP)
      13. 7.3.13 Overcurrent Protection
        1. 7.3.13.1 High-Side MOSFET Overcurrent Protection
        2. 7.3.13.2 Low-Side MOSFET Overcurrent Protection
      14. 7.3.14 Thermal Shutdown
      15. 7.3.15 Small-Signal Model for Loop Response
      16. 7.3.16 Simple Small-Signal Model for Peak Current-Mode Control
      17. 7.3.17 Small-Signal Model for Frequency Compensation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With VI < 4.5 V (minimum VI)
      2. 7.4.2 Operation With EN Control
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Supplementary Guidance
      2. 8.1.2 Differences Between the Two DRC Packages
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Switching Frequency
        2. 8.2.2.2 Output Voltage Set Point
        3. 8.2.2.3 Undervoltage Lockout Set Point
        4. 8.2.2.4 Input Capacitors
        5. 8.2.2.5 Output Filter Components
          1. 8.2.2.5.1 Inductor Selection
          2. 8.2.2.5.2 Capacitor Selection
        6. 8.2.2.6 Compensation Components
        7. 8.2.2.7 Bootstrap Capacitor
        8. 8.2.2.8 Power Dissipation Estimate
      3. 8.2.3 Application Curves
      4. 8.2.4 TPS54336A Typical Application
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Detailed Design Procedure
          1. 8.2.4.2.1 TPS54336A Design
          2. 8.2.4.2.2 Soft-Start Capacitor
        3. 8.2.4.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 開発サポート
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 関連リンク
    4. 11.4 ドキュメントの更新通知を受け取る方法
    5. 11.5 コミュニティ・リソース
    6. 11.6 商標
    7. 11.7 静電気放電に関する注意事項
    8. 11.8 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DRC|10
  • DDA|8
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings(1)

MIN MAX UNIT
Input voltage VIN –0.3 30 V
EN –0.3 6 V
BOOT –0.3 (VPH + 7.5) V
VSENSE –0.3 3 V
COMP –0.3 3 V
RT –0.3 3 V
SS –0.3 3 V
Output voltage BOOT-PH 0 7.5 V
PH –1 30 V
PH, 10-ns transient –3.5 30 V
VDIFF (GND to exposed thermal pad) –0.2 0.2 V
Source current EN 100 100 µA
RT 100 100 µA
PH Current-limit A
Sink current PH Current-limit A
COMP 200 200 µA
Operating junction temperature –40 150 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under the absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under the recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS–001, all pins(1) 2000 V
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) 500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VSS Supply input voltage 4.5 28 V
VOUT Output voltage 0.8 24 V
IOUT Output current 0 3 A
TJ Operating junction temperature(1) –40 150 °C
(1) The device must operate within 150°C to ensure continuous function and operation of the device.

6.4 Thermal Information

over operating free-air temperature range (unless otherwise noted)
THERMAL METRIC TPS5433xA TPS5433xA and TPS54335-1A TPS54335-2A UNIT
DDA (SO PowerPAD) DRC (VSON) DRC (VSON)
8 PINS 10 PINS 10 PINS
RθJA Junction-to-ambient thermal resistance 42.1 43.9 43.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 50.9 55.4 55.4 °C/W
RθJB Junction-to-board thermal resistance 31.8 18.9 18.9 °C/W
ψJT Junction-to-top characterization parameter 8 0.7 0.7 °C/W
ψJB Junction-to-board characterization parameter 13.5 19.1 19.1 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 7.1 5.3 5.3 °C/W

6.5 Electrical Characteristics

The electrical ratings specified in this section apply to all specifications in this document unless otherwise noted. These specifications are interpreted as conditions that will not degrade the parametric or functional specifications of the device for the life of the product containing it. TJ = –40°C to 150°C, VIN = 4.5 to 28 V, (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY VOLTAGE AND UVLO (VIN PIN)
Operating input voltage 4.5 28 V
Input UVLO threshold Rising VIN 4 4.5 V
Input UVLO hysteresis 180 400 mV
VIN-shutdown supply current VEN = 0 V 2 10 µA
VIN-operating non-switching supply current VVSENSE = 810 mV 310 800 µA
ENABLE (EN PIN)
Enable threshold Rising 1.21 1.28 V
Enable threshold Falling 1.1 1.17 V
Input current VEN = 1.1 V 1.15 µA
Hysteresis current VEN = 1.3 V 3.3 µA
VOLTAGE REFERENCE
Reference TJ =25°C 0.7936 0.8 0.8064 V
0.788 0.8 0.812
MOSFET
High-side switch resistance(1) V(BOOT-PH) = 3 V 160 280 mΩ
V(BOOT-PH) = 6 V 128 230 mΩ
Low-side switch resistance(1) VIN = 12 V 84 170 mΩ
ERROR AMPLIFIER
Error-amplifier transconductance (gm) –2 µA < ICOMP < 2 µA, VCOMP = 1 V 1300 µmhos
Error-amplifier source and sink VCOMP = 1 V, 100-mV overdrive 100 µA
Start switching peak current threshold 0.5 A
COMP to ISWITCH gm 8 A/V
CURRENT-LIMIT
High-side switch current-limit threshold  4 4.9 6.5 A
Low-side switch sourcing current-limit 3.5 4.7 6.1 A
Low-side switch sinking current-limit 0 A
THERMAL SHUTDOWN
Thermal shutdown 160 175 °C
Thermal shutdown hysteresis 10 °C
BOOT PIN
BOOT-PH UVLO  2.1 3 V
SOFT START
Soft-start charge current, TPS54336A 2.3 µA
(1) Measured at pins

6.6 Timing Requirements

MIN TYP MAX UNIT
CURRENT-LIMIT
Hiccup wait time 512 Cycles
Hiccup time before restart 16384 Cycles
THERMAL SHUTDOWN
Thermal shutdown hiccup time 32768 Cycles
SOFT START
Internal soft-start time, TPS54335A and TPS54335-1A 2 ms

6.7 Switching Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
PH PIN
Minimum on time Measured at 90% to 90% of VIN, IPH = 2 A 94 145  ns
Minimum off time V(BOOT-PH) ≥ 3 V 0%
SWITCHING FREQUENCY
Switching frequency range, TPS54335A and TPS54335-1A 50 1500 kHz
R(RT) = 100 kΩ 384 480 576 kHz
R(RT) = 1000 kΩ, –40°C to 105°C 40 50 60 kHz
R(RT) = 30 kΩ 1200 1500 1800 kHz
Internal switching frequency, TPS54336A 272 340 408 kHz

6.8 Typical Characteristics

TPS54335A TPS54335-1A TPS54336A C001_SLVSC03.png
VIN = 12 V
Figure 1. High-Side MOSFET on Resistance vs Junction Temperature
TPS54335A TPS54335-1A TPS54336A C003_SLVSC03.png
Figure 3. Voltage Reference vs Junction Temperature
TPS54335A TPS54335-1A TPS54336A C005_SLVSC03.png
VIN = 12 V
Figure 5. UVLO Threshold vs Junction Temperature
TPS54335A TPS54335-1A TPS54336A C007_SLVSC03.png
VIN = 12 V
Figure 7. Pullup Current vs Junction Temperature
TPS54335A TPS54335-1A TPS54336A C009_SLVSC03.png
VEN = 0 V
Figure 9. Shutdown Quiescent Current vs Input Voltage
TPS54335A TPS54335-1A TPS54336A C011_SLVSC03.png
VIN = 12 V
Figure 11. Minimum Controllable On Time vs Junction Temperature
TPS54335A TPS54335-1A TPS54336A C013_SLVSC03.png
Figure 13. BOOT-PH UVLO Threshold vs Junction Temperature
TPS54335A TPS54335-1A TPS54336A C002_SLVSC03.png
VIN = 12 V
Figure 2. Low-Side MOSFET on Resistance vs Junction Temperature
TPS54335A TPS54335-1A TPS54336A C004_SLVSC03.png
Figure 4. Oscillator Frequency vs Junction Temperature
TPS54335A TPS54335-1A TPS54336A C006_SLVSC03.png
VIN = 12 V
Figure 6. Hysteresis Current vs Junction Temperature
TPS54335A TPS54335-1A TPS54336A C008_SLVSC03.png
Figure 8. Non-Switching Operating Quiescent Current vs Input Voltage
TPS54335A TPS54335-1A TPS54336A C010_SLVSC03.png
Figure 10. SS Charge Current vs Junction Temperature
TPS54335A TPS54335-1A TPS54336A C012_SLVSC03.png
VIN = 12 V
Figure 12. Minimum Controllable Duty Ratio vs Junction Temperature
TPS54335A TPS54335-1A TPS54336A C014_SLVSC03.gif
Figure 14. Current Limit Threshold vs Input Voltage