JAJSLZ0A May   2023  – February 2024 TPS543A22

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  VIN Pins and VIN UVLO
      2. 6.3.2  Internal Linear Regulator and Bypassing
      3. 6.3.3  Enable and Adjustable UVLO
        1. 6.3.3.1 Internal Sequence of Events During Start-Up
      4. 6.3.4  Switching Frequency Selection
      5. 6.3.5  Switching Frequency Synchronization to an External Clock
        1. 6.3.5.1 Internal PWM Oscillator Frequency
        2. 6.3.5.2 Loss of Synchronization
        3. 6.3.5.3 Interfacing the SYNC/FSEL Pin
      6. 6.3.6  Remote Sense Amplifier and Adjusting the Output Voltage
      7. 6.3.7  Loop Compensation Guidelines
        1. 6.3.7.1 Output Filter Inductor Tradeoffs
        2. 6.3.7.2 Ramp Capacitor Selection
        3. 6.3.7.3 Output Capacitor Selection
        4. 6.3.7.4 Design Method for Good Transient Response
      8. 6.3.8  Soft Start and Prebiased Output Start-Up
      9. 6.3.9  MSEL Pin
      10. 6.3.10 Power Good (PG)
      11. 6.3.11 Output Overload Protection
        1. 6.3.11.1 Positive Inductor Current Protection
        2. 6.3.11.2 Negative Inductor Current Protection
      12. 6.3.12 Output Overvoltage and Undervoltage Protection
      13. 6.3.13 Overtemperature Protection
      14. 6.3.14 Output Voltage Discharge
    4. 6.4 Device Functional Modes
      1. 6.4.1 Forced Continuous-Conduction Mode
      2. 6.4.2 Discontinuous Conduction Mode During Soft Start
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 1.0-V Output, 1-MHz Application
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1  Custom Design With WEBENCH® Tools
          2. 7.2.1.2.2  Switching Frequency
          3. 7.2.1.2.3  Output Inductor Selection
          4. 7.2.1.2.4  Output Capacitor
          5. 7.2.1.2.5  Input Capacitor
          6. 7.2.1.2.6  Adjustable Undervoltage Lockout
          7. 7.2.1.2.7  Output Voltage Resistors Selection
          8. 7.2.1.2.8  Bootstrap Capacitor Selection
          9. 7.2.1.2.9  VDRV and VCC Capacitor Selection
          10. 7.2.1.2.10 PGOOD Pullup Resistor
          11. 7.2.1.2.11 Current Limit Selection
          12. 7.2.1.2.12 Soft-Start Time Selection
          13. 7.2.1.2.13 Ramp Selection and Control Loop Stability
          14. 7.2.1.2.14 MODE Pin
        3. 7.2.1.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
      3. 7.4.3 Thermal Performance
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Custom Design With WEBENCH® Tools
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Design Method for Good Transient Response

The following method to design converter compensation optimizes the load transient response.

  1. Calculate the require output impedance to meet transient response goals. This equation assumes the load step transient is faster than the BW of the converter.
    Equation 9. Z O U T _ R E Q U I R E D = d e l t a _ V O U T d e l t a _ I O U T
  2. Select a value for output inductance.
    Equation 10. L = V I N     -     V O U T I × V O U T V I N × 1 f S W
  3. Calculate the required converter output impedance to meet the transient response goal.
    Equation 11. Z O U T _ C O N V E R T E R = 0.00135     +     L τ C R A M P 34 × V O U T V R E F
    Ensure ZOUT_CONVERTER is less than the ZOUT_REQUIRED found in step 1. Also recheck the voltage on CRAMP is within acceptable limits. (see previous section) If it is too large, use a larger CRAMP value.
  4. Calculate the minimum output capacitance required to meet the impedance requirements.
    Equation 12. C O U T _ M I N = 1   2 π   ×   Z O U T _ C O N V E R T E R   ×     f C O _ D E S I R E D

    where

    • fCO_DESIRED is the desired converter closed loop crossover frequency, which is usually 1/8 to 1/4 of the converter switching frequency.
  5. Calculate the number of output capacitors required. From the previous section, use the guidelines for ESR to select a capacitor type and value, then use the equation here to find the number of capacitors required. Notice that the impedance of the capacitors (ESR plus impedance of the capacitance itself at the chosen crossover frequency) is used.
    Equation 13. Z C A P A C I T O R = R E S R _ C A P A C I T O R + 1 2 π     ×     C C A P A C I T O R     ×     F C O
    Equation 14. N C A P A C I T O R S = Z C A P A C I T O R Z O U T _ C O N V E R T E R
  6. Using one of the tools on TI.com, simulate with the values for the design.