SLUSC81 Data sheet

SLUSC81 May 2015 TPS544B25 , TPS544C25

PRODUCTION DATA.

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

RVF|40
- MPQF268C

サーマルパッド・メカニカル・データ

RVF|40
- QFND333E

発注情報

6 Pin Configuration and Functions

RVF Package

40-Pin LQFN

(Top View)

Pin Functions

NAME	NO.	DESCRIPTION
ADDR0	3	Sets low-order 3-bits of the PMBus address. Connect a resistor between this pin and AGND.
ADDR1	2	Sets high-order 3-bits of the PMBus address. Connect a resistor between this pin and AGND.
AGND	38	Analog ground return for controller device. Connect to GND at the thermal tab.
BP3	27	Output of the 3.3-V on-board regulator. This regulator powers the controller and should be bypassed with a minimum of 2.2 µF to AGND. BP3 is not designed to power external circuit.
BP6	28	Output of the 6.5-V on-board regulator. This regulator powers the driver stage of the controller and should be bypassed with a minimum of 2.2 µF to GND. TI recommends using an additional 100-nF typical bypass capacitor for reduce ripple on BP6.
BOOT	7	Bootstrap pin for the internal flying high-side driver. Connect a typical 100-nF capacitor from this pin to the SW pin.
CLK	5	PMBus CLK pin. See Supported PMBus Commands section.
CNTL	1	PMBus CNTL pin. See Supported PMBus Commands section. The CNTL pin has an internal pull-up and floats high when left floating.
COMP	35	Output of the error amplifier. Connect compensator network from this pin to the FB pin.
DATA	4	PMBus DATA pin. See Supported PMBus Commands section.
DIFFO	33	Output of the differential remote sense amplifier.
FB	34	Feedback pin for the control loop. Negative input of the error amplifier.
GND	13	Power stage ground return.
	14
	15
	16
	17
	18
	19
	20
PGND	26	Power ground return for controller device. Connect to GND at the thermal tab.
PGOOD	36	Power good output. Open drain output that floats up when the device is operating and in regulation. Any fault condition causes this pin to pull low. Please refer to Table 6 for the possible sources to pull down PGOOD pin.
RT	40	Frequency-setting resistor. Connect a resistor from this pin to AGND to program the switching frequency. Do not leave this pin floating.
SMBALERT	6	SMBus alert pin. See SMBus specification.
SW	8	Switched power output of the device. Connect the output averaging filter and bootstrap capacitor to this group of pins.
	9
	10
	11
	12
SYNC/RESET_B	39	For switching frequency synchronization or output voltage reset. The SYNC function allows synchronizing the oscillator to an external source that is either slower of faster than the nominal free running oscillator frequency. To use the SYNC function, VSET pin should be pulled up to BP3 or set the FORCE_SYNC bit in register MISC_CONFIG_OPTIONS (MFR_SPECIFIC_32) (F0h) if VSET function is used; if synchronization is not required, pull the SYNC pin to BP3. If the VSET pin is connected to AGND through a valid resistor to configure default output voltage, SYNC/RESET_B is configured as RESET_B function when FORCE_SYNC is not set. Then the logic low on the SYNC/RESET_B pin restores the output voltage to default value set by VSET without power cycling. When SYNC/RESET_B is configured as RESET_B function, there is an internal 200kΩ pull-up resistor to BP3.
TSNS/SS	37	External temperature sense signal input or alternatively used to set default soft-start time by connecting a resistor from this pin to AGND. Do not leave this pin floating. Disable TSNS by pulling TSNS to AGND and unsetting SS_DET_DIS in OPTIONS (MFR_SPECIFIC_21) (E5h) in applications where neither is needed.
VDD	29	Input power to the controller. Connect a low impedance bypass with a minimum of 1 µF to AGND. The VDD voltage is also used for input feed-forward. VIN and VDD must be the same potential for accurate short circuit protection.
VIN	21	Input power to the power stage. Low impedance bypassing of these pins to GND is critical.
	22
	23
	24
	25
VOUTS+	31	Load voltage sensing, positive side. This sensing provides remote sensing for the PMBus interface reporting and the voltage control loop.
VOUTS–	32	Load voltage sensing, negative or common side. This sensing provides remote sensing for the PMBus interface reporting and the voltage control loop.
VSET	30	Optionally configures default output voltage setting by connecting a resistor from this pin to AGND. See Set Default Output Voltage by VSET for details. If VSET is not used, pull this pin up to BP3. Do not leave this pin floating.
Thermal tab		Package thermal tab. Connect to GND. The thermal tab must have adequate solder coverage for proper operation.