JAJSP58 September 2022 TPS544C26
ADVANCE INFORMATION
| CMD Address | C2h |
| Write Transaction: | Write Byte |
| Read Transaction: | Read Byte |
| Format: | Unsigned Binary (1 byte) |
| NVM Back-up: | EEPROM |
| Updates: |
Vboot: on-the-fly. PROTOCOL_ID and ALL_CALL_SEL: field value update will wait until the power conversion is disabled. |
This PROTOCOL_ID_SVID command contains 3 fields for configuring the SVID Protocol ID, Vboot (boot up voltage), and All-call address selection.
The PROTOCOL_ID bits set the Protocol ID for SVID communication. The setting also programs an internal precision resistor divider thus determines the VOUT scaling (mV/LSB) of the device.
The Vboot bits program the initial output voltage at start-up when the output voltage is controlled by SVID interface (e.g. VOUT_CTRL = 00b or 01b).
The ALL_CALL_SEL bits set the All-call address for SVID communication.
Return to Supported I2C and Default Values.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
| PROTOCOL_ID | Vboot | ALL_CALL_SEL | |||||
| LEGEND: R/W = Read/Write; R = Read only |
| Bit | Field | Access | Reset | Description |
|---|---|---|---|---|
| 7:6 | PROTOCOL_ID | R/W | NVM | These bits set the Protocol
ID for SVID communication. The setting also programs an internal
precision resistor divider thus determines the VOUT scaling (mV/LSB)
of the device. 00b: SVID PROTOCOL ID = 04h (VR13, 10 mV). And VOUT_CMD step = 10 mV/LSB 01b: SVID PROTOCOL ID = 07h (VR13, 5 mV). And VOUT_CMD step = 5 mV/LSB 10b: SVID PROTOCOL ID = 09h (VR14, 5 mV). And VOUT_CMD step = 5 mV/LSB 11b: SVID PROTOCOL ID = 0Ah (VR14, 10 mV). And VOUT_CMD step = 10 mV/LSB The function selected in this field is loaded into SVID register (05h) PROTOCOL_ID as well. In order for this field to take effect, the power conversion must be disabled. Note: The TPS544C26 device is VR13 compliant and no support to VR14. |
| 5:2 | Vboot | R/W | NVM | These bits program the
initial output voltage at start-up. See Table 7-86 for the available settings. The Vboot and Protocol ID selections
have to align based on the listed options on Table 7-86 no matter the VOUT adjustment is controlled by SVID interface or
I2C interface. Otherwise, an error check will NACK the write
attempt. For example, a write attempt with C2h = 011111xxb (Vboot =
1.8 V and Protocol ID = 5 mV) will be NACKed, while a write attempt
with C2h = 011000xxb (Vboot = 1.1V and Protocol ID = 5mV) will be
ACKed. The function selected in this field is loaded into SVID register (26h) VBOOT as well, in VID format. |
| 1:0 | ALL_CALL_SEL | R/W | NVM | These bits set the All-call
address for SVID communication. 00b: Not support All-call address, will reject both 0Eh and 0Fh address 01b: Respond to All-call address 0Fh only 10b: Respond to All-call address 0Eh only 11b: Respond to All-call address both 0Eh and 0Fh The function selected in this field is loaded into SVID register (0Fh) ALLCALL_ACT as well. In order for this field to take effect, the power conversion must be disabled. |
| Vboot | VID code(1) (Hex) | Vboot (V) | PROTOCOL_ID |
|---|---|---|---|
| 0000b | 00h | 0 | Must set PROTOCOL_ID = 01b or 10b (VOUT step = 5 mV) |
| 0001b | 65h | 0.75 | |
| 0010b | 6Fh | 0.80 | |
| 0011b | 79h | 0.85 | |
| 0100b | 83h | 0.90 | |
| 0101b | 8Dh | 0.95 | |
| 0110b | 97h | 1.00 | |
| 0111b | A1h | 1.05 | |
| 1000b | ABh | 1.10 | |
| 1001b | AFh | 1.20 | |
| 1010b | C9h | 1.25 | |
| 1011b | DDh | 1.35 | |
| 1100b | FBh | 1.50 | |
| 1101b | 6Fh | 1.60 | Must set PROTOCOL_ID = 00b or 11b (VOUT step = 10 mV) |
| 1110b | 79h | 1.70 | |
| 1111b | 83h | 1.80 |