JAJSP58 September 2022 TPS544C26
ADVANCE INFORMATION
The TPS544C26 device offers selectable 7-bit I2C address either through a resistor from the I2C_ADDR pin (pin 29) to AGND, or programmable by writing an 7-bit address value into the (A2h) I2C_ADDR register.
As the default configuration, a resistor from the I2C_ADDR pin (pin 29) to AGND sets the pre-configured 7-bit I2C address (0x70 to 0x7F) in the memory map. Up to 16 different addresses can be set, allowing 16 devices with unique addresses in a single system. TI recommends ±1% tolerance resistors with a typical temperature coefficient of ±100 ppm/°C
As an alternative method, the I2C address of a TPS544C26 device can be programmed by writing an address value into (A2h) I2C_ADDR register. This register supports the full range from 00h to 7Fh (7-bit, ‘0000000’ to ‘1111111’). And, an override bit has to be set to ‘1’ so that TPS544C26 device ignores the pin 29 detection and straightly go to (A2h) I2C_ADDR register for I2C address. This method allows much more flexibility on the address selections. This override bit locates in (A0h) SYS_CFG_USER1 register bit[0].
For the programmed address to take effect, below actions have to be taken:
RADDR (kΩ) | (A2h) I2C_ADDR (Bin) | (A2h) I2C_ADDR (Hex) |
---|---|---|
SHORT | 1110000 | 70 |
5.62 | 1110001 | 71 |
9.53 | 1110010 | 72 |
14 | 1110011 | 73 |
21 | 1110100 | 74 |
30.1 | 1110101 | 75 |
36.5 | 1110110 | 76 |
43.2 | 1110111 | 77 |
51.1 | 1111000 | 78 |
61.9 | 1111001 | 79 |
75 | 1111010 | 7A |
88.7 | 1111011 | 7B |
105 | 1111100 | 7C |
127 | 1111101 | 7D |
150 | 1111110 | 7E |
FLOAT | 1111111 | 7F |
For example, using 9.53 kΩ selects 1110010b (72h) as the 7-bit I2C address. Then the 8-bit I2C address is 11100100b (E4h), which is the 7-bit address followed by the write bit 0b.
Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
1 | 1 | 1 | 0 | 0 | 1 | 0 | 0 |
7 bits set by address pin resistor | Write bit |