SLUSF22 November   2024 TPS54538

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Fixed Frequency Peak Current Mode
      2. 6.3.2  Mode Selection
      3. 6.3.3  Voltage Reference
      4. 6.3.4  Output Voltage Setting
      5. 6.3.5  Switching Frequency Selection / Synchronization
      6. 6.3.6  Phase Shift
      7. 6.3.7  Enable and Adjusting Undervoltage Lockout
      8. 6.3.8  External Soft Start and Prebiased Soft Start
      9. 6.3.9  Power Good
      10. 6.3.10 Minimum On Time, Minimum Off Time, and Frequency Foldback
      11. 6.3.11 Frequency Spread Spectrum
      12. 6.3.12 Overvoltage Protection
      13. 6.3.13 Overcurrent and Undervoltage Protection
      14. 6.3.14 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Modes Overview
      2. 6.4.2 Heavy Load Operation
      3. 6.4.3 Pulse Frequency Modulation
      4. 6.4.4 Forced Continuous Conduction Modulation
      5. 6.4.5 Dropout Operation
      6. 6.4.6 Minimum On-Time Operation
      7. 6.4.7 Shutdown Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Custom Design With WEBENCH® Tools
        2. 7.2.2.2 Output Voltage Resistors Selection
        3. 7.2.2.3 Choosing Switching Frequency
        4. 7.2.2.4 Soft-Start Capacitor Selection
        5. 7.2.2.5 Output Inductor Selection
        6. 7.2.2.6 Output Capacitor Selection
        7. 7.2.2.7 Input Capacitor Selection
        8. 7.2.2.8 Feedforward Capacitor CFF Selection
        9. 7.2.2.9 Maximum Ambient Temperature
      3. 7.2.3 Application Curves
    3. 7.3 Best Design Practices
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Third-Party Products Disclaimer
      2. 8.1.2 Development Support
        1. 8.1.2.1 Custom Design With WEBENCH® Tools
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

4 Pin Configuration and Functions

Figure 4-1 9-Pin RQF VQFN-HR, 1.5mm × 2mm Package (Top View)
Table 4-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
RT/SYNC 1 A Frequency select and external clock synchronization. A resistor to ground sets the switching frequency of the device. An external clock can also be applied to this pin to synchronize the switching frequency. See Section 6.3.5 for details.
EN 2 A Enable input to the converter. Driving EN high or leaving this pin floating enables the converter. An external resistor divider can be used to implement an adjustable VIN UVLO function.
FB 3 A Output feedback input. Connect FB to the tap of an external resistor divider from the output to GND to set output voltage.
GND 4 G Ground pin. Connected to the source of the low-side FET as well as the ground pin for the controller circuit. Connect to system ground and the ground side of CIN and COUT. The path to CIN must be as short as possible.
VIN 5, 6 P Supply input pin to internal LDO and high-side FET. Input bypass capacitors must be directly connected to this pin and GND.
Mode 7 A Mode selection pin in light load condition and Power-Good / Soft-Start function. See Mode Selection for details.
SW 8 P Switching output of the convertor. Internally connected to the source of the high-side FET and drain of the low-side FET. Connect to the power inductor.
SS/PG 9 A This pin can be a soft-start function or Power-Good function depending on the mode pin configuration. If the soft-start function is selected, an external capacitor connected from this pin to GND defines the rise time for the internal reference voltage. If Power-Good function is selected, this is an open drain power-good indicator, which is asserted low if output voltage is out of PG threshold, overvoltage, or if the device is under thermal shutdown, EN shutdown, or during soft start.
(1) A = Analog, P = Power, G = Ground