SLUSF22 November   2024 TPS54538

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Fixed Frequency Peak Current Mode
      2. 6.3.2  Mode Selection
      3. 6.3.3  Voltage Reference
      4. 6.3.4  Output Voltage Setting
      5. 6.3.5  Switching Frequency Selection / Synchronization
      6. 6.3.6  Phase Shift
      7. 6.3.7  Enable and Adjusting Undervoltage Lockout
      8. 6.3.8  External Soft Start and Prebiased Soft Start
      9. 6.3.9  Power Good
      10. 6.3.10 Minimum On Time, Minimum Off Time, and Frequency Foldback
      11. 6.3.11 Frequency Spread Spectrum
      12. 6.3.12 Overvoltage Protection
      13. 6.3.13 Overcurrent and Undervoltage Protection
      14. 6.3.14 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Modes Overview
      2. 6.4.2 Heavy Load Operation
      3. 6.4.3 Pulse Frequency Modulation
      4. 6.4.4 Forced Continuous Conduction Modulation
      5. 6.4.5 Dropout Operation
      6. 6.4.6 Minimum On-Time Operation
      7. 6.4.7 Shutdown Mode
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Custom Design With WEBENCH® Tools
        2. 7.2.2.2 Output Voltage Resistors Selection
        3. 7.2.2.3 Choosing Switching Frequency
        4. 7.2.2.4 Soft-Start Capacitor Selection
        5. 7.2.2.5 Output Inductor Selection
        6. 7.2.2.6 Output Capacitor Selection
        7. 7.2.2.7 Input Capacitor Selection
        8. 7.2.2.8 Feedforward Capacitor CFF Selection
        9. 7.2.2.9 Maximum Ambient Temperature
      3. 7.2.3 Application Curves
    3. 7.3 Best Design Practices
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Third-Party Products Disclaimer
      2. 8.1.2 Development Support
        1. 8.1.2.1 Custom Design With WEBENCH® Tools
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Switching Frequency Selection / Synchronization

TPS54538 can work under RT mode and SYNC mode by different configuration of the RT/SYNC pin. The condition of this input is detected when the device is first enabled. After the converter is running, the switching frequency selection is fixed and cannot be changed until the next power-on cycle or EN toggle.

In RT mode, the switching frequency of TPS54538 can be set with RT selection programming. Table 6-2 shows the RT selection programming. When RT is connected with resistor, the switching frequency can be set between 200kHz and 2200kHz using Equation 2.

Equation 2. RT=44500fSW-2

where

  • RT is the value of RT timing resistor in kΩ.
  • fSW is the switching frequency in kHz.

Table 6-2 RT/SYNC Pin Resistor Settings
RT / SYNC PinResistanceSwitching Frequency
Floating85kΩ500kHz
GND40kΩ1000kHz
Resistor18kΩ to 220kΩ200kHz to 2200kHz

There are four cases where the switching frequency does not conform to the condition set by the RT/SYNC pin:

  • Light load operation (PFM mode)
  • Low dropout operation
  • Minimum on-time operation
  • Current limit tripped
Under all of these cases, the switching frequency folds back, meaning the switching frequency is less than that programmed by the RT/SYNC pin. During these conditions, the output voltage remains in regulation, except for current limit operation.

An internal Phase Locked Loop (PLL) has been implemented to allow synchronization from 200kHz to 2200kHz, and to easily switch from RT mode to SYNC mode. To implement the synchronization feature, connect a square wave clock signal to the RT/SYNC pin with a on time >= 100ns. The clock signal amplitude must transition lower than 0.9V and higher than 1.7V.

In applications where both RT mode and SYNC mode are needed, an RC circuit as shown in Figure 6-3 can be used to interface the RT/SYNC pin but the capacitive load slows down the transition back to RT mode. The RT/SYNC pin must not be left connect to GND / floating and 100pF capacitor is recommended. When using the series RC circuit, verify the amplitude of the signal at the RT/SYNC pin must transition lower than 0.9V and higher than 1.7V.

TPS54538 SYNC Mode Configuration Figure 6-3 SYNC Mode Configuration
Note:
  • If SYNC is active before start-up, TPS54538 works in SYNC clock.
  • If SYNC not active before start-up, TPS54538 works at default clock (based on RT resistor). When SYNC clock active, TPS54538 works in SYNC mode.
    • If SYNC clock is out of range (200k to approximately 2.2MHz), TPS54538 works at the end frequency (200k, 2.2Mhz).
    • SYNC clock is not locked during operation.