JAJSLY1G July   2013  – June 2021 TPS54561

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed Frequency PWM Control
      2. 7.3.2  Slope Compensation Output Current
      3. 7.3.3  Pulse Skip Eco-mode
      4. 7.3.4  Low Dropout Operation and Bootstrap Voltage (BOOT)
      5. 7.3.5  Error Amplifier
      6. 7.3.6  Adjusting the Output Voltage
      7. 7.3.7  Enable and Adjusting Undervoltage Lockout
      8. 7.3.8  Soft Start/Tracking Pin (SS/TR)
      9. 7.3.9  Sequencing
      10. 7.3.10 Constant Switching Frequency and Timing Resistor (RT/CLK) Pin)
      11. 7.3.11 Maximum Switching Frequency
      12. 7.3.12 Synchronization to RT/CLK Pin
      13. 7.3.13 Accurate Current Limit Operation
      14. 7.3.14 Power Good (PWRGD Pin)
      15. 7.3.15 Overvoltage Protection
      16. 7.3.16 Thermal Shutdown
      17. 7.3.17 Small Signal Model for Loop Response
      18. 7.3.18 Simple Small Signal Model for Peak Current Mode Control
      19. 7.3.19 Small Signal Model for Frequency Compensation
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Buck Converter for 7-V to 60-V Input to 5-V at 5-A Output
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Custom Design with WEBENCH® Tools
          2. 8.2.1.2.2  Selecting the Switching Frequency
          3. 8.2.1.2.3  Output Inductor Selection (LO)
          4. 8.2.1.2.4  Output Capacitor
          5. 8.2.1.2.5  Catch Diode
          6. 8.2.1.2.6  Input Capacitor
          7. 8.2.1.2.7  Slow Start Capacitor
          8. 8.2.1.2.8  Bootstrap Capacitor Selection
          9. 8.2.1.2.9  Undervoltage Lockout Set Point
          10. 8.2.1.2.10 Output Voltage and Feedback Resistors Selection
          11. 8.2.1.2.11 Compensation
          12. 8.2.1.2.12 Power Dissipation Estimate
          13. 8.2.1.2.13 Safe Operating Area
          14. 8.2.1.2.14 Discontinuous Conduction Mode and Eco-mode Boundary
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Inverting Buck-Boost Topology for Positive Input to Negative Output
      3. 8.2.3 Split-Rail Topology for Positive Input to Negative and Positive Output
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Estimated Circuit Area
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Custom Design with WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.5 Electrical Characteristics

TJ = –40°C to 150°C, VIN = 4.5 V to 60 V (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
SUPPLY VOLTAGE (VIN PIN)
Operating input voltage4.560V
Internal undervoltage lockout thresholdRising4.14.34.48V
Internal undervoltage lockout threshold hysteresis325mV
Shutdown supply currentEN = 0 V, 25°C, 4.5 V ≤ VIN ≤ 60 V2.254.5μA
Operating: nonswitching supply currentFB = 0.9 V, TA = 25°C152200
ENABLE AND UVLO (EN PIN)
Enable threshold voltageNo voltage hysteresis, rising and falling1.11.21.3V
Input currentEnable threshold +50 mV–4.6μA
Enable threshold –50 mV–0.58–1.2-1.8
Hysteresis current–2.2–3.4-4.5μA
Enable to COMP activeVIN = 12 V, TA = 25°C540µs
VOLTAGE REFERENCE
Voltage reference0.7920.80.808V
HIGH-SIDE MOSFET
On-resistanceVIN = 12 V, BOOT-SW = 6 V87185mΩ
ERROR AMPLIFIER
Input current50nA
Error amplifier transconductance (gM)–2 μA < ICOMP < 2 μA, VCOMP = 1 V350μMhos
Error amplifier transconductance (gM) during soft-start–2 μA < ICOMP < 2 μA, VCOMP = 1 V, VFB = 0.4 V77μMhos
Error amplifier dc gainVFB = 0.8 V10,000V/V
Min unity gain bandwidth2500kHz
Error amplifier source/sinkV(COMP) = 1 V, 100 mV overdrive±30μA
COMP to SW current transconductance17A/V
CURRENT LIMIT
Current limit thresholdAll VIN and temperatures, Open Loop(1)6.37.58.8A
All temperatures, VIN = 12 V, Open Loop(1)6.37.58.3
VIN = 12 V, TA = 25°C, Open Loop(1)7.17.57.9
Current limit threshold delay60ns
THERMAL SHUTDOWN
Thermal shutdown176°C
Thermal shutdown hysteresis12°C
TIMING RESISTOR AND EXTERNAL CLOCK (RT/CLK PIN)
RT/CLK high threshold1.552V
RT/CLK low threshold0.51.2V
SOFT START AND TRACKING (SS/TR PIN)
Charge currentVSS/TR = 0.4 V1.7µA
SS/TR-to-FB matchingVSS/TR = 0.4 V42mV
SS/TR-to-reference crossover98% nominal1.16V
SS/TR discharge current (overload)FB = 0 V, VSS/TR = 0.4 V354µA
SS/TR discharge voltageFB = 0 V54mV
POWER GOOD (PWRGD PIN)
FB threshold for PWRGD lowFB falling90%
FB threshold for PWRGD highFB rising93%
FB threshold for PWRGD lowFB rising108%
FB threshold for PWRGD highFB falling106%
HysteresisFB falling2.5%
Output high leakageVPWRGD = 5.5 V, TA = 25°C10nA
On resistanceIPWRGD = 3 mA, VFB < 0.79 V45Ω
Minimum VIN for defined outputVPWRGD < 0.5 V, IPWRGD = 100 µA0.92V
(1) Open Loop current limit measured directly at the SW pin and is independent of the inductor value and slope compensation.