JAJSLY1G July 2013 – June 2021 TPS54561
PRODUCTION DATA
The TPS54561 implements peak current mode control in which the COMP pin voltage controls the peak current of the high side MOSFET. A signal proportional to the high side switch current and the COMP pin voltage are compared each cycle. When the peak switch current intersects the COMP control voltage, the high side switch is turned off. During overcurrent conditions that pull the output voltage low, the error amplifier increases switch current by driving the COMP pin high. The error amplifier output is clamped internally at a level which sets the peak switch current limit. The TPS54561 provides an accurate current limit threshold with a typical current limit delay of 60 ns. With smaller inductor values, the delay will result in a higher peak inductor current. The relationship between the inductor value and the peak inductor current is shown in Figure 7-16.