JAJSLY1G July 2013 – June 2021 TPS54561
PRODUCTION DATA
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
TIMING RESISTOR AND EXTERNAL CLOCK (RT/CLK PIN) | |||||
Minimum CLK input pulse width | 15 | ns | |||
RT/CLK falling edge to SW rising edge delay – Measured at 500 kHz with RT resistor in series | 55 | ns |