JAJSIO4A February 2020 – September 2020 TPS546A24A
PRODUCTION DATA
CMD Address | 03h |
Write Transaction: | Send Byte |
Read Transaction: | N/A |
Format: | Data-less |
Phased: | Yes |
NVM Back-up: | No |
Updates: | On-the-fly |
CLEAR_FAULTS is a phased command used to clear any fault bits that have been set. This command simultaneously clears all bits in all status registers of the selected phase, or all phases if PHASE = FFh. At the same time, the device releases its SMB_ALERT# signal output if SMB_ALERT# is asserted. CLEAR_FAULTS is a write-only command with no data.
The CLEAR_FAULTS command does not cause a unit that has latched off for a fault condition to restart. If the fault is still present when the bit is cleared, the fault bit is immediately set again and the host is notified by the usual means.
If the device responds to an Alert Response Address (ARA) from the host, it will clear SMB_ALERT# but not the offending status bit or bits (as it has successfully notified the host and then expects the host to handle the interrupt appropriately). The original fault and any from other sources that occur between the initial assertion of SMB_ALERT# and the successful response of the device to the ARA are cleared (through CLEAR_FAULTS, OFF-ON toggle, or power reset) before any of these sources are allowed to re-trigger SMB_ALERT#. However, fault sources which only become active post-ARA trigger SMB_ALERT#.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
W | W | W | W | W | W | W | W |
CLEAR_FAULTS |
LEGEND: R/W = Read/Write; R = Read only |