JAJSP25 November 2023 TPS546A24S
PRODUCTION DATA
| CMD Address | 15h |
| Write Transaction: | Send Byte |
| Read Transaction: | N/A |
| Format: | Data-less |
| Phased: | No, PHASE = FFh only |
| NVM Back-up: | No |
| Updates: | Not recommended for on-the-fly-use, but not explicitly blocked |
The STORE_USER_ALL command instructs the PMBus device to copy the entire contents of the Operating Memory to the matching locations in the non-volatile User Store memory. Any items in Operating Memory that do not have matching locations in the User Store are ignored.
NVM Store operations are not recommended while the output voltages are in regulation, although the user is not explicitly prevented from doing so, as interruption can result in a corrupted NVM. PMBus commands issued during this time can cause long clock stretch times, or simply be ignored. TI recommends disabling regulation, and waiting a minimum of 100 ms before continuing, following issuance of NVM store operations.
To prevent storing mismatched register values to NVM, STORE_USER_ALL must not be used unless PHASE = FFh.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| W | W | W | W | W | W | W | W |
| STORE_USER_ALL | |||||||
| LEGEND: R/W = Read/Write; R = Read only |