JAJSP25 データシート

JAJSP25 November 2023 TPS546A24S

PRODUCTION DATA

パッケージ・オプション

6.6.23 (26h) VOUT_MARGIN_LOW

CMD Address	26h
Write Transaction:	Write Word
Read Transaction:	Read Word
Format:	ULINEAR16, per VOUT_MODE
Phased:	No
NVM Back-up:	EEPROM

The VOUT_MARGIN_LOW command loads the unit with the voltage to which the output is to be changed when the OPERATION command is set to “Margin Low”. Output voltage transitions during margin operation occur at the slew rate defined by VOUT_TRANSITION_RATE.

When the MARGIN bits in the OPERATION command indicate “Margin Low,” the output voltage is updated to the value of VOUT_MARGIN_LOW + VOUT_TRIM.

Figure 6-29 (26h) VOUT_MARGIN_LOW Register Map

15	14	13	12	11	10	9	8
RW	RW	RW	RW	RW	RW	RW	RW
VOUT_MARGIN_LOW (High Byte)

7	6	5	4	3	2	1	0
RW	RW	RW	RW	RW	RW	RW	RW
VOUT_MARGIN_LOW (Low Byte)

LEGEND: R/W = Read/Write; R = Read only

Table 6-37 Register Field Descriptions

Bit	Field	Access	Reset	Description
15:0	VOUT_ MARGL	RW	NVM	Margin Low output voltage. ULINEAR16 relative or absolute per the setting of VOUT_ MODE

The minimum and maximum valid data values for VOUT_MARGIN_LOW follow the description in VOUT_COMMAND. Attempts to write (26h) VOUT_MARGIN_LOW to any value outside those specified as valid will be considered invalid/unsupported data and cause the TPS546A24S to respond by flagging the appropriate status bits and notifying the host according to the PMBus 1.3.1 Part II specification section 10.9.3.

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発注情報

6.6.23 (26h) VOUT_MARGIN_LOW