SLVSAV0B April   2011  – October 2014 TPS55010

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Rating
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Fixed Frequency PWM Control
      2. 8.3.2  Half Bridge and Bootstrap Voltage
      3. 8.3.3  Error Amplifier
      4. 8.3.4  Voltage Reference
      5. 8.3.5  Adjusting the Output Voltage
      6. 8.3.6  Enable and Adjusting Undervoltage Lockout
      7. 8.3.7  Adjusting Slow Start Time
      8. 8.3.8  Constant Switching Frequency and Timing Resistor (RT/CLK Pin)
      9. 8.3.9  How to Interface to RT/CLK Pin
      10. 8.3.10 Overcurrent Protection
      11. 8.3.11 Reverse Overcurrent Protection
      12. 8.3.12 FAULT Pin
      13. 8.3.13 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation of the Fly-Buck™ Converter
  9. 9 Application And Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1  Design Guide - Step-by-Step Design Procedure
      2. 9.2.2  Primary Side Voltage
      3. 9.2.3  Voltage Feedback
        1. 9.2.3.1 Turns Ratio
      4. 9.2.4  Selecting the Switching Frequency and Primary Inductance
      5. 9.2.5  Primary Side Capacitor
      6. 9.2.6  Secondary Side Diode
      7. 9.2.7  Secondary Side Capacitor
      8. 9.2.8  Input Capacitor
      9. 9.2.9  Y - Capacitor
      10. 9.2.10 Slow Start Capacitor
      11. 9.2.11 Bootstrap Capacitor Selection
      12. 9.2.12 UVLO Resistors
      13. 9.2.13 Compensation
      14. 9.2.14 Design Tips
      15. 9.2.15 How to Specify a Fly-Buck Transformer
      16. 9.2.16 Application Curves
    3. 9.3 Typical Application, Dual Output
      1. 9.3.1 Design Guide Requirements
      2. 9.3.2 Detailed Design Procedures
        1. 9.3.2.1 Primary Side Voltage for Dual Output
        2. 9.3.2.2 Turns Ratio
        3. 9.3.2.3 Voltage Feedback
        4. 9.3.2.4 Selecting the Switching Frequency and Primary Inductance
          1. 9.3.2.4.1 Primary Side Capacitor
          2. 9.3.2.4.2 Secondary Side Diode
          3. 9.3.2.4.3 Secondary Side Capacitor
          4. 9.3.2.4.4 Input Capacitor
        5. 9.3.2.5 Compensation
        6. 9.3.2.6 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ

7 Specifications

7.1 Absolute Maximum Ratings (1)

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
Voltage VIN –0.3 7 V
EN –0.3 3.6 V
BOOT PH + 7 V
VSENSE –0.3 3 V
COMP –0.3 3 V
FAULT –0.3 7 V
SS –0.3 3 V
RT/CLK –0.3 6 V
BOOT-PH –0.3 7 V
PH –0.6 7 V
PH, 10ns Transient –2 10 V
Current EN 100 µA
RT/CLK 100 µA
COMP 100 uA
FAULT 10 mA
SS 100 µA
Operating Junction Temperature –40 150 °C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ELECTRICAL SPECIFICATIONS is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7.2 Handling Rating

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
Tstg Storage Temperature –65 150 °C
V(ESD) Electrostatic Discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) –2 2 kV
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2) –500 500 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VI Input voltage 2.98 6 V
PO Output power 2 W

7.4 Thermal Information

THERMAL METRIC(1) TPS55010 UNIT
RTE (16 PINS)
θJA Junction-to-ambient thermal resistance 60 °C/W
θJCtop Junction-to-case (top) thermal resistance 55.5
θJB Junction-to-board thermal resistance 24.9
ψJT Junction-to-top characterization parameter 1.0
ψJB Junction-to-board characterization parameter 24.9
θJCbot Junction-to-case (bottom) thermal resistance 9.9
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

TJ = –40°C TO 150°C, VIN = 2.95V TO 6V (unless otherwise noted)
DESCRIPTION CONDITIONS MIN TYP MAX UNIT
SUPPLY VOLTAGE
Operating input voltage VIN 2.95 6 V
Shutdown current EN = 0V, 25°C 2 5 µA
Operating current VSENSE = 0.9V, 25°C 360 575 µA
Internal undervoltage lockout 2.6 2.9 V
ENABLE
Enable threshold rising 1.25 1.37 V
falling 1.15 1.18
Input current Threshold - 50mV –1.2 µA
Threshold + 50mV –4.6 µA
Hysteresis 3.4
VOLTAGE REFERENCE
Reference 3V < VIN < 6V 0.804 0.829 0.854 V
MOSFET
High side switch resistance BOOT- PH = 5 V 45 81 mΩ
Low side switch resistance VIN = 5 V 45 81 mΩ
ERROR AMPLIFIER
Input current 50 nA
Error amp transconductance -2 µA < I(COMP) < 2 µA 245 uS
Error amp dc gain VSENSE = 0.8 V 500 V/V
Minimum unity gain Bandwidth 3 MHz
Error amp source/sink V(COMP) = 1V, 100 mV overdrive ±16 µA
COMP to Iph gm I(PH) = 0.5 A 7.5 A/V
CURRENT LIMIT
High side sourcing current limit VIN = 3 V 2 2.75 A
Low Side Sinking Current Limit VIN = 3 V –3 –4.5 A
THERMAL SHUTDOWN
Thermal Shutdown 171 °C
OT Hysteresis 12 °C
RT/CLK
RT/CLK voltage R(RT/CLK) = 195 kΩ 0.5 V
RT/CLK high threshold 1.6 2.2 V
RT/CLK low threshold 0.4 0.6 V
BOOT
Boot UVLO 2.5 V
SS Slow Start
Charge current V(SS) = 0.4 V 0.5 2.2 4 µA
SS to VSENSE matching V(SS) = 0.4 V 35 mV
SS to reference Crossover 98% reference 1.1 V
SS discharge current (overload) VSENSE = 0 V 325 µA
SS discharge voltage VSENSE = 0V 46 mV
SS discharge current (UVLO, EN, thermal fault) V(SS) = 0.5 V 1.2 mA
VIN UVLO to SS start time 100 µs
FAULT Pin
VSENSE threshold VSENSE falling 91 % VREF
VSENSE rising 108 % VREF
Output high leakage VSENSE = VREF, V(FAULT) = 5.5 V 2 nA
Output low I(FAULT) = 3 mA 0.3 V
Minimum VIN for valid output V(FAULT) < 0.5 V at 100 µA 1.6 V

7.6 Timing Requirements

MIN TYP MAX UNIT
RT/CLK
Minimum CLK pulse width 75 ns

7.7 Switching Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
PH
ton Minimum on time Measured at 10% to 10% of VIN 130 ns
toff Minimum off time V(BOOT-PH) ≥ 3 V 0%
RT/CLK
Switching frequency using CLK mode 300 2000 kHz
Switching frequency using RT mode 100 2000 kHz
Switching Frequency R(RT/CLK) = 195 kΩ 400 500 600 kHz
PLL lock in time 50 µs
RT/CLK falling edge to PH rising edge delay 90 ns
SS Slow Start
VIN UVLO to SS start time 100 µs

7.8 Typical Characteristics

TPS55010 g001_lvsav0.png
Figure 1. High Side and Low Side RDS(on)
vs Temperature
TPS55010 g003.png
Figure 3. High Side Current Limit (Sourcing) vs
Junction Temperature
TPS55010 g005_lvsav0.png
Figure 5. Error Amplifier Transconductance vs Temperature
TPS55010 g007_lvsav0.png
Figure 7. EN Pin Pullup
vs Temperature (VEN = Threshold -50 mV)
TPS55010 g009_lvsav0.png
Figure 9. SS Charge Current vs Temperature
TPS55010 g011_lvsav0.png
Figure 11. Shutdown Supply Current vs Temperature
TPS55010 g013_lvsav0.png
Figure 13. Voltage Reference vs Temperature
TPS55010 g015.png
Figure 15. Fault On-Resistance vs Temperature
TPS55010 g002_lvsav0.png
Figure 2. Frequency vs Temperature
TPS55010 g004.png
Figure 4. Low Side Current Limit (Sinking) vs
Junction Temperature
TPS55010 g006_lvsav0.png
Figure 6. EN Pin Voltage vs Temperature
TPS55010 g008_lvsav0.png
Figure 8. EN Pin Hysteresis Current
vs Temperature
TPS55010 g010_lvsav0.png
Figure 10. Input Start and Stop Voltage vs Temperature
TPS55010 g012_lvsav0.png
Figure 12. VIN Supply Current vs Temperature
TPS55010 g014.png
Figure 14. Fault Threshold vs Temperature
TPS55010 g016_lvsav0.png
Figure 16. SS to VSENSE Offset vs Temperature