SLIS132A October   2008  – March 2015 TPS55065-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Dissipation Ratings
    6. 6.6 Electrical Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Switched-Mode Input/Output Terminals (L1, L2)
      2. 7.3.2  Supply Terminal (Vdriver)
      3. 7.3.3  Internal Supply Decoupling Terminal (Vlogic)
      4. 7.3.4  Input Voltage Monitoring Terminal (AIN)
      5. 7.3.5  Input Undervoltage Alarm Terminal (AOUT)
      6. 7.3.6  Reset Delay Timer Terminal (REST)
      7. 7.3.7  Reset Terminal (RESET)
      8. 7.3.8  Main Regulator Output Terminal (VOUT)
      9. 7.3.9  Low-Power-Mode Terminal (CLP)
      10. 7.3.10 Switch-Output Terminal (5Vg)
      11. 7.3.11 5Vg-Enable Terminal (5Vg_ENABLE)
      12. 7.3.12 Slew-Rate Control Terminals (SCR0, SCR1)
      13. 7.3.13 Modulator Frequency Setting (Terminal Rmod)
      14. 7.3.14 Ground Terminal (PGND)
      15. 7.3.15 Enable Terminal (ENABLE)
      16. 7.3.16 Bootstrap Terminals (CBOOT1 and CBOOT2)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Clock Modulator
      2. 7.4.2 Buck/Boost Transitioning
      3. 7.4.3 Buck SMPS
      4. 7.4.4 Boost SMPS
      5. 7.4.5 Extension of the Input Voltage Range on V(driver)
      6. 7.4.6 Low-Power Mode
      7. 7.4.7 Temperature and Short-Circuit Protection
      8. 7.4.8 Switch Output Terminal (5Vg) Current Limitation
      9. 7.4.9 Soft Start
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Buck Mode
        2. 8.2.2.2 Boost Mode
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Inductor
      2. 10.1.2 Filter Capacitors
      3. 10.1.3 Traces and Ground Plane
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9 Power Supply Recommendations

The TPS55065-Q1 device is designed to operate from an input voltage up to 40 V. Ensure that the input supply is well regulated. Furthermore, if the supply voltage in the application is likely to reach negative voltage (for example, reverse battery), a forward diode must be placed at the input of the supply. For the VIN pin, a good quality ceramic capacitor is recommended. Capacitance de-rating for aging, temperature, and DC bias must be taken into account while determining the capacitor value. The decoupling capacitor must be as close as possible to the Input pin for proper filtering. The use of a low-ESR capacitor at the VOUT line is recommended to minimize the voltage ripple on the output due to transients. The L and C component values can be chosen as per specifications.