As for all switching power supplies, especially those with high frequency and high switch current, PCB layout is an important design step. If the layout is not carefully designed, the regulator could suffer from instability and noise problems.

Figure 11-1 and Figure 11-2 show the board layout. The top-side layer is laid out in a manner typical of a user application. The top, bottom, and internal layers are 2-oz. copper. The top layer contains the main power traces for VIN, VOUT, and SW. The top layer also has connections for the remaining pins of the TPS55340-EP and a large area filled with ground. The internal layers and bottom are primarily ground with additional fill areas for VIN and VOUT. The top-side ground traces connect to the bottom and internal ground planes with multiple vias placed around the board. Nine vias directly under the TPS55340-EP device provide a thermal path from the top-side ground plane to the bottom-side ground plane. Place the output decoupling capacitors (C8 through C10 and C6) as close to the IC as possible. The copper area of the SW node is kept small to minimize noise. The vias near the diode, D1, on the VOUT plane aid with thermal dissipation. Additionally, keep the voltage setpoint resistor divider components close to the IC. The voltage divider network ties to the output voltage at the point of regulation, the copper VOUT trace at the J7 output connector. For the TPS55340-EP, an additional input bulk capacitor may be necessary, depending on the board connection to the input supply. Critical analog circuits such as the voltage setpoint divider, frequency-set resistor, slow-start capacitor, and compensation components terminate to ground using a separate ground trace on the top and bottom connected power ground; pour only at one point directly under the IC.