JAJSC03E january   2014  – may 2023 TPS562200 , TPS563200

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings #GUID-10807E29-2FD4-4A3F-94B2-FDEBD147A133/SLVSC819633
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics TPS562200
    8. 6.8 Typical Characteristics TPS563200
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 The Adaptive On-Time Control And PWM Operation
      2. 7.3.2 Advanced Eco-mode Control
      3. 7.3.3 Soft Start And Pre-Biased Soft Start
      4. 7.3.4 Current Protection
      5. 7.3.5 Over Voltage Protection
      6. 7.3.6 UVLO Protection
      7. 7.3.7 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Eco-mode Operation
      3. 7.4.3 Standby Operation
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Tps562200 4.5-V To 17-V Input, 1.05-V Output Converter
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedures
          1. 8.2.1.2.1 Custom Design with WEBENCH® Tools
          2. 8.2.1.2.2 Output Voltage Resistors Selection
          3. 8.2.1.2.3 Output Filter Selection
          4. 8.2.1.2.4 Input Capacitor Selection
          5. 8.2.1.2.5 Bootstrap Capacitor Selection
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Tps563200 4.5-V To 17-V Input, 1.05-V Output Converter
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedures
          1. 8.2.2.2.1 Output Filter Selection
        3. 8.2.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 Custom Design with WEBENCH® Tools
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Mechanical, Packaging, And Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報
8.2.1.2.3 Output Filter Selection

The LC filter used as the output filter has double pole at:

Equation 3. GUID-18660CE4-4A14-43EC-B6BE-B046173B0802-low.gif

At low frequencies, the overall loop gain is set by the output set-point resistor divider network and the internal gain of the device. The low frequency phase is 180 degrees. At the output filter pole frequency, the gain rolls off at a –40 dB per decade rate and the phase drops rapidly. D-CAP2 control scheme introduces a high frequency zero that reduces the gain roll off to –20 dB per decade and increases the phase to 90 degrees one decade above the zero frequency. The inductor and capacitor selected for the output filter must be selected so that the double pole of Equation 3 is located below the high frequency zero but close enough that the phase boost provided be the high frequency zero provides adequate phase margin for a stable circuit. To meet this requirement use the values recommended in Table 1.

Table 8-2 TPS562200 Recommended Component Values
Output Voltage (V)R2 (kΩ)R3 (kΩ)L1(uH)C5 + C6 (µF)
MINTYPMAX
13.0910.01.52.24.720 - 68
1.053.7410.01.52.24.720 - 68
1.25.7610.01.52.24.720 - 68
1.59.5310.01.52.24.720 - 68
1.813.710.01.52.24.720 - 68
2.522.610.02.23.34.720 - 68
3.333.210.02.23.34.720 - 68
554.910.03.34.74.720 - 68
6.57510.03.34.74.720 - 68

The inductor peak-to-peak ripple current, peak current and RMS current are calculated using Equation 4, Equation 5 and Equation 6. The inductor saturation current rating must be greater than the calculated peak current and the RMS or heating current rating must be greater than the calculated RMS current. Use 650 kHz for ƒSW.

Use 650 kHz for ƒSW. Make sure the chosen inductor is rated for the peak current of Equation 5 and the RMS current of Equation 6.

Equation 4. GUID-9716A112-46B0-42D3-8736-9FFD7BE46D84-low.gif
Equation 5. GUID-91CA371D-51BA-4B8E-A93E-97C89910EF80-low.gif
Equation 6. GUID-619C8ED4-A1F1-410C-9E63-330C47FFD47C-low.gif

For this design example, the calculated peak current is 2.34 A and the calculated RMS current is 2.01 A. The inductor used is a TDK CLF7045T-2R2N with a peak current rating of 5.5 A and an RMS current rating of 4.3 A

The capacitor value and ESR determines the amount of output voltage ripple. The device is intended for use with ceramic or other low ESR capacitors. Recommended values range from 20 µF to 68 µF. Use Equation 7 to determine the required RMS current rating for the output capacitor.

Equation 7. GUID-C3142616-2E25-4DC9-AB7B-FBEBDDDFA20F-low.gif

For this design, two TDK C3216X5R0J226M 22-µF output capacitors are used. The typical ESR is 2 mΩ each. The calculated RMS current is 0.286 A and each output capacitor is rated for 4 A.