JAJSL53 October 2021 TPS563212
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
SUPPLY | ||||||
VIN | Operation input voltage | 4.2 | 18 | V | ||
IQ(VIN) | VIN quiescent current at power save mode | Nonswitching, VEN = 1.2 V, VFB = 0.65 V, IOUT = 0 mA | 120 | µA | ||
VIN quiescent current at FCCM | Nonswitching, VEN = 1.2 V, VFB = 0.65 V, IOUT = 0 mA | 450 | µA | |||
ISD(VIN) | VIN shutdown supply current | VIN = 12 V, VEN = 0 V | 3 | 10 | µA | |
UVLO | ||||||
VUVLO(R) | VIN UVLO rising threshold | VIN rising | 3.8 | 4 | 4.2 | V |
VUVLO(F) | VIN UVLO falling threshold | VIN falling | 3.4 | 3.6 | 3.8 | V |
ENABLE | ||||||
VEN(R) | EN voltage rising threshold | EN rising, enable switching | 1.05 | 1.15 | 1.25 | V |
VEN(F) | EN voltage falling threshold | EN falling, disable switching | 0.91 | 1.01 | 1.10 | V |
IEN(P1) | EN pin sourcing current pre-EN rising threshold | VEN = 1.0 V | 0.93 | 1.2 | 1.5 | µA |
IEN(H) | EN pin sourcing current hysteresis | 2.4 | 3.1 | 3.81 | µA | |
REFERENCE VOLTAGE | ||||||
VFB | FB voltage | TJ = 25°C | 0.594 | 0.6 | 0.606 | V |
TJ = –40°C to 125°C, VIN = 12 V | 0.591 | 0.6 | 0.609 | V | ||
IFB(LKG) | FB input leakage current | VFB = 0.65 V, TJ = 25°C | –0.1 | 0 | 0.1 | µA |
START-UP | ||||||
ISS | Soft-start charge current | VSS = 0 V | 4.5 | 6.6 | 8.3 | µA |
tSS | Internal fixed soft-start time | From first switching pulse until target VOUT | 1.5 | 2 | 2.6 | ms |
SWITCHING FREQUENCY | ||||||
fSW(FCCM) | Switching frequency, FCCM operation | 1100 | 1200 | 1300 | kHz | |
POWER STAGE | ||||||
RDSON(HS) | High-side MOSFET on-resistance | TJ = 25°C, VIN = 12 V, VBOOT-SW = 5 V | 66 | mΩ | ||
RDSON(LS) | Low-side MOSFET on-resistance | TJ = 25°C, VIN = 12 V | 33 | mΩ | ||
tON(min)(1) | Minimum ON pulse width | 45 | ns | |||
tON(max) | Maximum ON pulse width | 6 | µs | |||
tOFF(min) | Minimum OFF pulse width | 105 | ns | |||
OVERCURRENT PROTECTION | ||||||
IHS(OC) | High-side peak current limit | Peak current limit on HS MOSFET | 4.25 | 5 | 5.75 | A |
ILS(OC) | Low-side valley current limit | Valley current limit on LS MOSFET, VIN = 12 V | 3.0 | 4 | 4.9 | A |
ILS(NOC) | Low-side negative current limit for FCCM | Sinking current limit on LS MOSFET, VIN = 12 V | 1.1 | 1.5 | 2.2 | A |
tHIC(WAIT) | Wait time before entering Hiccup | 108 | µs | |||
tHIC(RE) | Hiccup time before re-start | 6 | Cycles | |||
OUTPUT OVP AND UVP | ||||||
VUVP | Undervoltage-protection (UVP) threshold voltage | VFB falling | 62.5% | |||
UVP hysteresis | 5% | |||||
VOVP | Overvoltage-protection (OVP) threshold voltage | VFB rising | 107% | 112% | 114% | |
OVP hysteresis | 5% | |||||
POWER GOOD | ||||||
VPGTH | Power-good threshold | FB falling, PG from high to low | 82% | 87% | 92% | |
FB rising, PG from low to high | 87% | 92% | 97% | |||
FB falling, PG from low to high | 101% | 107% | 112% | |||
FB rising, PG from high to low | 107% | 112% | 114% | |||
VPG(OL) | PG pin output low-level voltage | IPG = 0.6 mA | 0.3 | V | ||
IPG(LKG) | PG pin leakage current when open drain output is high | VPG = 5.5 V | –1 | 1 | µA | |
tPG(R) | PG delay going from low to high | 112 | µs | |||
tPG(F) | PG delay going from high to low | 48 | µs | |||
Minimum VIN for valid output(1) | VPG/SS < 0.5 V at 100 μA | 2 | 2.5 | V | ||
THERMAL SHUTDOWN | ||||||
TJ(SD)(1) | Thermal shutdown threshold | 150 | °C | |||
TJ(HYS)(1) | Thermal shutdown hysteresis | 20 | °C |