JAJSGJ9A November   2018  – May 2019 TPS56339

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
      2.      TPS56339 の効率
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Advanced Emulated Current Mode Control
      2. 7.3.2 Enable and Adjusting Undervoltage Lockout
      3. 7.3.3 Soft Start and Pre-Biased Soft Start
      4. 7.3.4 Voltage Reference
      5. 7.3.5 Minimum ON-time, Minimum OFF-time and Frequency Foldback at Dropout Conditions
      6. 7.3.6 Overcurrent and Undervoltage Protection
      7. 7.3.7 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
      3. 7.4.3 CCM Operation
    5. 7.5 Light-Load Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Output Voltage Resistors Selection
        3. 8.2.2.3 Output Inductor Selection
        4. 8.2.2.4 Output Capacitor Selection
        5. 8.2.2.5 Input Capacitor Selection
        6. 8.2.2.6 Bootstrap Capacitor Selection
      3. 8.2.3 Undervoltage Lockout Set Point
      4. 8.2.4 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントの更新通知を受け取る方法
    2. 11.2 関連リンク
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.2.5 Input Capacitor Selection

The TPS56339 requires an input decoupling capacitor and a bulk capacitor is needed depending on the application. TI recommends a ceramic capacitor over 10 µF for the decoupling capacitor. An additional 0.1-µF capacitor (C3) from VIN pin to ground is recommended to provide additional high frequency filtering. The capacitor voltage rating needs to be greater than the maximum input voltage. The capacitor must also have a ripple current rating greater than the maximum input current ripple of the TPS56339. The input ripple current can be calculated using Equation 16.

Equation 16. TPS56339 eq-19-SLVSEI2.gif

The value of a ceramic capacitor varies significantly over temperature and the amount of DC bias applied to the capacitor. The capacitance variations due to temperature can be minimized by selecting a dielectric material that is stable over temperature. X5R and X7R ceramic dielectrics are usually selected for power regulator capacitors because they have a high capacitance to volume ratio and are fairly stable over temperature. The output capacitor must also be selected with the DC bias taken into account. The capacitance value of a capacitor decreases as the DC bias across a capacitor increases. For this example design, a ceramic capacitor with at least a 35-V voltage rating is required to support the maximum input voltage. For this example, two Murata GRM21BR6YA106KE43L (10-μF, 35-V, 0805, X5R) capacitors have been selected. The effective capacitance under input voltage of 12 V for each one is 0.269 × 10 = 2.69 μF. The input capacitance value determines the input ripple voltage of the regulator. The input voltage ripple can be calculated using Equation 17. Using the design example values, IOUT_MAX = 3 A, CIN_E = 2 × 2.69 = 5.38 μF, fSW = 500 kHz, yields an input voltage ripple of 279 mV and a RMS input ripple current of 1.48 A.

Equation 17. TPS56339 eq-20-SLVSEI2.gif

where

  • RESR_MAX is the maximum series resistance of the input capacitor