SLVSBV4B April   2013  – October 2015 TPS56428

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 PWM Operation
      2. 8.3.2 PWM Frequency and Adaptive On-Time Control
      3. 8.3.3 Advanced Auto-Skip Eco-mode™ Control
      4. 8.3.4 Soft Start and Pre-Biased Soft Start
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power Good
      2. 8.4.2 Output Discharge Control
      3. 8.4.3 Current Protection
      4. 8.4.4 UVLO Protection
      5. 8.4.5 Thermal Shutdown
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Filter Selection
        2. 9.2.2.2 Input Capacitor Selection
        3. 9.2.2.3 Bootstrap Capacitor Selection
        4. 9.2.2.4 VREG5 Capacitor Selection
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Information
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

11 Layout

11.1 Layout Guidelines

  1. The TPS56428 can supply relatively large current up to 4 A; so heat dissipation may be a concern. The top side area adjacent to the TPS56428 must be filled with ground as much as possible to dissipate heat.
  2. The bottom side area directly below the IC must be a dedicated ground area; and, be directly connected to the thermal pad using vias as shown. The ground area must be as large as practical. Additional internal layers can be dedicated as ground planes and connected to vias as well.
  3. Keep the input switching current loop as small as possible.
  4. Keep the SW node as physically small and short as possible to minimize parasitic capacitance and inductance and to minimize radiated emissions. Kelvin connections must be brought from the output to the feedback pin of the device.
  5. Keep analog and non-switching components away from switching components.
  6. Make a single point connection from the signal ground to power ground.
  7. Do not allow switching current to flow under the device.
  8. Keep the pattern lines for VIN and PGND broad.
  9. Exposed pad of device must be connected to PGND with solder.
  10. VREG5 capacitor must be placed near the device, and connected PGND.
  11. Output capacitor must be connected to a broad pattern of the PGND.
  12. Voltage feedback loop must be as short as possible, and preferably with ground shield.
  13. Lower resistor of the voltage divider which is connected to the VFB pin must be tied to SGND.
  14. Providing sufficient via is preferable for VIN, SW and PGND connection.
  15. PCB pattern for VIN, SW, and PGND must be as broad as possible.
  16. VIN Capacitor must be placed as near as possible to the device.

11.2 Layout Example

TPS56428 TPS56428_layout_SLVSBV4.gif Figure 17. TPS56428 Layout – HSOP (DDA) Package
TPS56428 RHL_layout_slvsbv4.gif Figure 18. TPS56428 Layout – VQFN (RHL) Package

11.3 Thermal Information

This 8-pin DDA package incorporates an exposed thermal pad that is designed to be soldered directly to an external heatsink. The thermal pad must be soldered directly to the printed board (PCB). After soldering, the PCB can be used as a heatsink. In addition, through the use of thermal vias, the thermal pad can be attached directly to the appropriate copper plane shown in the electrical schematic for the device, or alternatively, can be attached to a special heatsink structure designed into the PCB. This design optimizes the heat transfer from the integrated circuit (IC).

For additional information on the exposed thermal pad and how to use the advantage of its heat dissipating abilities, refer to Technical Brief, PowerPAD™ Thermally Enhanced Package, Texas Instruments Literature No. SLMA002 and Application Brief, PowerPAD™ Made Easy, Texas Instruments Literature No. SLMA004.

The exposed thermal pad dimensions for this package are shown in Figure 19.

TPS56428 thermal_pad_lvsb42.gif Figure 19. Thermal Pad Dimensions – HSOP (DDA) Package