SLVSBV4B April   2013  – October 2015 TPS56428

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 PWM Operation
      2. 8.3.2 PWM Frequency and Adaptive On-Time Control
      3. 8.3.3 Advanced Auto-Skip Eco-mode™ Control
      4. 8.3.4 Soft Start and Pre-Biased Soft Start
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power Good
      2. 8.4.2 Output Discharge Control
      3. 8.4.3 Current Protection
      4. 8.4.4 UVLO Protection
      5. 8.4.5 Thermal Shutdown
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Filter Selection
        2. 9.2.2.2 Input Capacitor Selection
        3. 9.2.2.3 Bootstrap Capacitor Selection
        4. 9.2.2.4 VREG5 Capacitor Selection
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Information
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Pin Configuration and Functions

8-Pin HSOP with Thermal Pad
DDA PACKAGE
(Top View)
TPS56428 fig002_SLVSBV4.gif
14-Pin VQFN with Thermal Pad
RHL Package
(Top View)
TPS56428 RHL_14_pin_SLVSBV4.gif

Pin Functions

PIN DESCRIPTION
NUMBER
NAME DDA RHL
EN 1 9 Enable input control. Active high. Active high and must be pulled up to enable the device.
VFB 2 10 Converter feedback input. Connect to output voltage with feedback resistor divider.
VREG5 3 11, 12 5.5 V power supply output. A capacitor (typical 0.47 µF) should be connected to GND. VREG5 is not active when EN is low.
PG 4 13 Open drain power good output.
GND 5 1, 2, 3, 14 Ground pin. Power ground return for switching circuit. Connect sensitive SS and VFB returns to GND at a single point.
Connect all four GND pins together on a PCB trace as short as possible.
SW 6 4, 5 Switch node connection between high-side NFET and low-side NFET.
Connect two SW pins together on a PCB trace.
VBST 7 6 Supply input for the high-side FET gate drive circuit. Connect 0.1µF capacitor between VBST and SW pins. An internal diode is connected between VREG5 and VBST.
VIN 8 7, 8 Input voltage supply pin.
Connect two VIN pins together on a PCB trace as short as possible.
Exposed Thermal Pad Back side Back side Thermal pad of the package. Must be soldered to achieve appropriate dissipation. Must be connected to GND.