JAJSEQ9E November 2013 – December 2017 TPS56520 , TPS56720 , TPS56920 , TPS56C20
PRODUCTION DATA.
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
The TPS56X20 contains four customer-accessible registers. Register 0 is the Output Voltage register. Registers 8 and 9 set several operating features for the regulator. The lower 3 bits of Register 9 sets the current limit for the high-current, etc. Register 24 provides the status of the regulator. The register map is as follows:
Register
Name |
Addr
(Decimal) |
Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
---|---|---|---|---|---|---|---|---|---|
VOUT | 0 | Odd Parity | VOUT[6:0] | ||||||
Control A | 8 | Internal Mode | PGOOD Delay [1:0] | Hiccup Mode On | — | ECO Mode On | DAC Settle [1:0] | ||
Control B | 9 | Enable | — | OVP Latchoff Mode Off | UVP Latchoff Mode Off | — | Current Limit [2:0] | ||
Status
(Read Only) |
24 | — | TI Only | TI Only | TI Only | TI Only | OT Shut Down | Early OT Warn | PGOOD |