JAJSDV2 September   2017 TPS565201

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Adaptive On-Time Control and PWM Operation
      2. 7.3.2 Pulse Skip Mode
      3. 7.3.3 Soft Start and Pre-Biased Soft Start
      4. 7.3.4 Current Protection
      5. 7.3.5 Undervoltage Lockout (UVLO) Protection
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Eco-mode Operation
      3. 7.4.3 Standby Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Voltage Resistors Selection
        2. 8.2.2.2 Output Filter Selection
        3. 8.2.2.3 Input Capacitor Selection
        4. 8.2.2.4 Bootstrap Capacitor Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントの更新通知を受け取る方法
    2. 11.2 コミュニティ・リソース
    3. 11.3 商標
    4. 11.4 静電気放電に関する注意事項
    5. 11.5 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The device is a typical step-down DC-DC converter for converting a higher dc voltage to a lower dc voltage with a maximum available output current of 5 A. The following design procedure can be used to select component values for the TPS565201. Alternately, the WEBENCH® software may be used to generate a complete design. The WEBENCH software uses an iterative design procedure and accesses a comprehensive database of components when generating a design. This section presents a simplified discussion of the design process.

8.2 Typical Application

The application schematic in Figure 14 shows the TPS565201 4.5-V to 17-V input, 1.05-V output converter design meeting the requirements for 5-A output. This circuit is available as the evaluation module (EVM). The sections provide the design procedure.

Figure 14. TPS565201 1.05-V, 5-A Reference Design

8.2.1 Design Requirements

Table 1 shows the design parameters for this application.

Table 1. Design Parameters

PARAMETER EXAMPLE VALUE
Input voltage range 4.5 to 17 V
Output voltage 1.05 V
Transient response, 1-A/us slew rate ΔVout = ±5%
Input ripple voltage 400 mV
Output ripple voltage 20 mV
Output current rating 5 A
Operating frequency 550 kHz

8.2.2 Detailed Design Procedure

8.2.2.1 Output Voltage Resistors Selection

The output voltage is set with a resistor divider from the output node to the VFB pin. TI recommends to use 1% tolerance or better divider resistors. Start by using Equation 2 to calculate VOUT.

To improve efficiency at very light loads consider using larger value resistors. However, using too high of resistance causes the circuit to be more susceptible to noise; and, voltage errors from the VFB input current will be more noticeable.

Equation 2. TPS565201 Eq_Vout_SLVSE71.gif

8.2.2.2 Output Filter Selection

The LC filter used as the output filter has double pole at:

Equation 3. TPS565201 Eq_03_SLVSD90.gif

At low frequencies, the overall loop gain is set by the output set-point resistor divider network and the internal gain of the device. The low frequency phase is 180°. At the output filter pole frequency, the gain rolls off at a –40 dB per decade rate and the phase drops rapidly. D-CAP2 introduces a high frequency zero that reduces the gain roll off to –20 dB per decade and increases the phase to 90° one decade above the zero frequency. The inductor and capacitor for the output filter must be selected so that the double pole of Equation 3 is located below the high frequency zero but close enough that the phase boost provided be the high frequency zero provides adequate phase margin for a stable circuit. To meet this requirement use the values recommended in Table 2.

Table 2. Recommended Component Values

OUTPUT VOLTAGE (V) R1 (kΩ) R2 (kΩ) L1 (µH) C8 + C9 (µF)
MIN TYP MAX
1 3.09 10.0 1.0 2.2 4.7 20 to 68
1.05 3.74 10.0 1.0 2.2 4.7 20 to 68
1.2 5.76 10.0 1.0 2.2 4.7 20 to 68
1.5 9.53 10.0 1.5 2.2 4.7 20 to 68
1.8 13.7 10.0 1.5 2.2 4.7 20 to 68
2.5 22.6 10.0 2.2 2.2 4.7 20 to 68
3.3 33.2 10.0 2.2 2.2 4.7 20 to 68
5 54.9 10.0 3.3 3.3 4.7 20 to 68
6.5 75 10.0 3.3 3.3 4.7 20 to 68

The inductor peak-to-peak ripple current, peak current and RMS current are calculated using Equation 4, Equation 5, and Equation 6. The inductor saturation current rating must be greater than the calculated peak current and the RMS or heating current rating must be greater than the calculated RMS current.

Use 550 kHz for ƒSW. Make sure the chosen inductor is rated for the peak current of Equation 5 and the RMS current of Equation 7.

Equation 4.
Equation 5.
Equation 6. TPS565201 Eq_06_SLVSD90.gif

For this design example, the calculated peak current is 5.4 A and the calculated RMS current is 5 A. The inductor used is a WE 744311220 with a peak current rating of 13 A and an RMS current rating of 9 A.

The capacitor value and ESR determines the amount of output voltage ripple. The TPS565201 is intended for use with ceramic or other low ESR capacitors. Recommended values range from 20 µF to 68 µF. Use Equation 7 to determine the required RMS current rating for the output capacitor.

Equation 7. TPS565201 Eq_07_SLVSD90.gif

For this design two TDK C3216X5R0J226M 22-µF output capacitors are used. The typical ESR is 2 mΩ each. The calculated RMS current is 0.229 A.

8.2.2.3 Input Capacitor Selection

The TPS565201 requires an input decoupling capacitor and a bulk capacitor is needed depending on the application. TI recommends a ceramic capacitor over 10 µF for the decoupling capacitor. An additional 0.1-µF capacitor (C3) from pin 3 to ground is optional to provide additional high frequency filtering. The capacitor voltage rating needs to be greater than the maximum input voltage.

8.2.2.4 Bootstrap Capacitor Selection

A 0.1-µF ceramic capacitor must be connected between the VBST to SW pin for proper operation. TI recommends to use a ceramic capacitor.

8.2.3 Application Curves

TPS565201 D050_TPS565201.gif
VIN = 5 V VOUT = 1.05 V
Figure 15. Load Regulation, VIN = 5 V
TPS565201 D045_TPS565201.gif
Figure 17. Line Regulation
TPS565201 Input_Voltage_Ripple_19_SLVSE71.gif
1 µs/div
Figure 19. TPS565201 Input Voltage Ripple
TPS565201 Output_Voltage_Ripple_IOUT_2p5A_21_SLVSE71.gif
1 µs/div
Figure 21. TPS565201 Output Voltage Ripple, IOUT 2.5 A
TPS565201 Load_Transient_Response_0p1A_to_2p5A_23_SLVSE71.gif
100 µs/div
Figure 23. TPS565201 Transient Response 0.1 to 2.5 A
TPS565201 Load_Transient_Response_2p5A_to_5A_25_SLVSE71.gif
100 µs/div
Figure 25. TPS565201 Transient Response, 2.5 to 5 A
TPS565201 Start-up_Relative_to_EN_27_SLVSE71.gif
400 µs/div
Figure 27. TPS565201 Startup Relative to EN
TPS565201 Shut-Down_Relative_to_EN_29_SLVSE71.gif
400 µs/div
Figure 29. TPS565201 Shutdown Relative to EN
TPS565201 D051_TPS565201.gif
VIN = 12 V VOUT = 1.05 V
Figure 16. Load Regulation, VIN = 12 V
TPS565201 D040_TPS565201.gif
VOUT = 1.05 V
Figure 18. Efficiency vs Output Current
TPS565201 Output_Voltage_Ripple_Noload_20_SLVSE71.gif
1 µs/div
Figure 20. TPS565201 Output Voltage Ripple, No Load
TPS565201 Output_Voltage_Ripple_IOUT_5A_22_SLVSE71.gif
1 µs/div
Figure 22. TPS565201 Output Voltage Ripple, IOUT 5 A
TPS565201 Load_Transient_Response_1p25A_to_3p75A_24_SLVSE71.gif
100 µs/div
Figure 24. TPS565201 Transient Response, 1.25 to 3.75 A
TPS565201 Start-up_Relative_to_VIN_26_SLVSE71.gif
2 ms/div
Figure 26. TPS565201 Startup Relative to VIN
TPS565201 Shut-Down_Relative_to_VIN_28_SLVSE71.gif
20 ms/div
Figure 28. TPS565201 Shutdown Relative to VIN