SLVS279D March   2000  – August 2015 TPS61000 , TPS61002 , TPS61005 , TPS61006 , TPS61007

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Available Options
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagrams
    3. 9.3 Feature Description
      1. 9.3.1 Controller Circuit
      2. 9.3.2 Device Enable
      3. 9.3.3 Undervoltage Lockout
      4. 9.3.4 Low-Battery Detector Circuit (LBI and LBO)
      5. 9.3.5 Low-EMI Switch
      6. 9.3.6 Adjustable Output Voltage (TPS61000 and TPS61007 Only)
    4. 9.4 Device Functional Modes
      1. 9.4.1 Power Save Mode
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Schematic of TPS6100x Evaluation Modules (TPS6100XEVM156)
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Programming the TPS61000 and TPS61007 Adjustable Output Voltage Devices
        2. 10.2.2.2 Programming the Low Battery Comparator Threshold Voltage
        3. 10.2.2.3 Inductor Selection
        4. 10.2.2.4 Capacitor Selection
        5. 10.2.2.5 Rectifier Selection
        6. 10.2.2.6 Compensation of the Control Loop
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Thermal Considerations
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Related Links
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

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12 Layout

12.1 Layout Guidelines

For all switching power supplies, the layout is an important step in the design, especially at high peak currents and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground tracks. The input capacitor, output capacitor, and the inductor should be placed as close as possible to the IC. Use a common ground node for power ground and a different one for control ground to minimize the effects of ground noise. Connect these ground nodes at any place close to one of the ground pins of the IC. The feedback divider should be placed as close as possible to the control ground pin of the IC. To lay out the control ground, it is recommended to use short traces as well, separated from the power ground traces. This avoids ground shift problems, which can occur due to superimposition of power ground current and control ground current.

12.2 Layout Example

TPS61000 TPS61001 TPS61002 TPS61003 TPS61004 TPS61005 TPS61006 TPS61007 layout_ex_slvs279.gifFigure 24. Layout Diagram

12.3 Thermal Considerations

Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added heat sinks and convection surfaces, and the presence of other heat-generating components affect the power dissipation limits of a given component.

Three basic approaches for enhancing thermal performance are listed below:

  • Improving the power dissipation capability of the PWB design
  • Improving the thermal coupling of the component to the PWB
  • Introducing airflow in the system

The maximum junction temperature (TJ) of the TPS6100x devices is 125°C. The thermal resistance of the 10-pin MSOP package (DGS) is RθJA = 161°C/W. Specified regulator operation is assured to a maximum ambient temperature (TA) of 85°C. Therefore, the maximum power dissipation is about 248 mW. More power can be dissipated if the maximum ambient temperature of the application is lower.

Equation 8. TPS61000 TPS61001 TPS61002 TPS61003 TPS61004 TPS61005 TPS61006 TPS61007 q8_pdmax_lvs279.gif

Under normal operating conditions, the sum of all losses generated inside the converter IC is less than 50 mW, which is well below the maximum allowed power dissipation of 248 mW as calculated in Equation 8. Therefore, power dissipation is given no special attention.

Table 6 shows where the losses inside the converter are generated.

Table 6. Losses Inside the Converter

LOSSES AMOUNTS
Conduction losses in the switch 36 mW
Switching losses 8 mW
Gate drive losses 2.3 mW
Quiescent current losses < 1 mW
TOTAL < 50 mW