TPS6101x High-Efficiency, 1-Cell and 2-Cell Boost Converters
1 Features
- Integrated Synchronous Rectifier for Highest Power Conversion Efficiency (> 95%)
- Start-Up Into Full Load With Supply Voltages as Low as 0.9 V, Operating Down to 0.8 V
- 200-mA Output Current From 0.9-V Supply
- Powersave-Mode for Improved Efficiency at Low Output Currents
- Autodischarge Allows to Discharge Output Capacitor During Shutdown
- Device Quiescent Current Less Than 50 μA
- Ease-of-Use Through Isolation of Load From Battery During Shutdown of Converter
- Integrated Antiringing Switch Across Inductor
- Integrated Low Battery Comparator
- Micro-Small 10-Pin MSOP or 3 mm x 3 mm QFN Package
- EVM Available (TPS6101xEVM-157)
2 Applications
- All Single- or Dual-Cell Battery Operated Products
- Internet Audio Players
- Pager
- Portable Medical Diagnostic Equipment
- Remote Control
- Wireless Headsets
Simplified Application Circuit
3 Description
The TPS6101x devices are boost converters intended for systems that are typically operated from a single- or dual-cell nickel-cadmium (NiCd), nickel-metal hydride (NiMH), or alkaline battery.
The converter output voltage can be adjusted from 1.5 V to a maximum of 3.3 V, by an external resistor divider or, is fixed internally on the chip. The devices provide an output current of 200 mA with a supply voltage of only 0.9 V. The converter starts up into a full load with a supply voltage of only 0.9 V and stays in operation with supply voltages down to 0.8 V.
The converter is based on a fixed frequency, current mode, pulse-width-modulation (PWM) controller that goes automatically into power save mode at light load. It uses a built-in synchronous rectifier, so, no external Schottky diode is required and the system efficiency is improved. The current through the switch is limited to a maximum value of 1300 mA. The converter can be disabled to minimize battery drain. During shutdown, the load is completely isolated from the battery.
An autodischarge function allows discharging the output capacitor during shutdown mode. This is especially useful when a microcontroller or memory is supplied, where residual voltage across the output capacitor can cause malfunction of the applications. When programming the ADEN-pin, the autodischarge function can be disabled. A low-EMI mode is implemented to reduce interference and radiated electromagnetic energy when the converter enters the discontinuous conduction mode. The device is packaged in the micro-small space saving 10-pin MSOP package. The TPS61010 is also available in a 3 mm x 3 mm 10-pin QFN package.
Device Information(1)
| PART NUMBER | PACKAGE | BODY SIZE (NOM) |
|---|---|---|
| TPS61010 | VSSOP (10) | 3.00 mm x 3.00 mm |
| VSON (10) | ||
| TPS61011 | VSSOP (10) | 3.00 mm x 3.00 mm |
| TPS61012 | ||
| TPS61013 | ||
| TPS61014 | ||
| TPS61015 | ||
| TPS61016 |
- For all available packages, see the orderable addendum at the end of the datasheet.
4 Revision History
Changes from E Revision (December 2014) to F Revision
- Moved Storage temperature range, Tstg to the Absolute Maximum RatingsGo
- Changed Handling Ratings To ESD RatingsGo
- Changed RθJA = 294°C/W" To: RθJA = 161.8°C/W in Thermal ConsiderationsGo
- Changed text "maximum power dissipation is about 130 mW." To: "maximum power dissipation is about 247 mW." in Thermal ConsiderationsGo
- Changed Equation 8 From: = 136 mW To: = 247 mW Go
Changes from D Revision (June 2005) to E Revision
- Added Pin Configuration and Functions section, Handling Rating table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go
5 Device Comparison Table
| TA | OUTPUT VOLTAGE (V) | PART NUMBER(1) | MARKING DGS PACKAGE | PACKAGE(2) |
|---|---|---|---|---|
| –40°C to 85°C | Adjustable from 1.5 to 3.3 | TPS61010DGS | AIP | 10-Pin MSOP |
| 1.5 | TPS61011DGS | AIQ | ||
| 1.8 | TPS61012DGS | AIR | ||
| 2.5 | TPS61013DGS | AIS | ||
| 2.8 | TPS61014DGS | AIT | ||
| 3.0 | TPS61015DGS | AIU | ||
| 3.3 | TPS61016DGS | AIV | ||
| Adjustable from 1.5 to 3.3 | TPS61010DRC | AYA | 10-Pin QFN |
6 Pin Configuration and Functions
Pin Functions
| PIN | I/O | DESCRIPTION | ||
|---|---|---|---|---|
| NAME | DRG NO. |
DRC NO. |
||
| ADEN | 8 | 8 | I | Autodischarge output. The autodischarge function is enabled if this pin is connected to VBAT, it is disabled if ADEN is tied to GND. |
| COMP | 2 | 2 | I | Compensation of error amplifier. Connect an R/C/C network to set frequency response of control loop. |
| EN | 1 | 1 | I | Chip-enable input. The converter is switched on if this pin is set high, it is switched off if this pin is connected to GND. |
| FB | 3 | 3 | I | Feedback input for adjustable output voltage version TPS61010. Output voltage is programmed depending on the output voltage divider connected there. For the fixed output voltage versions, leave FB-pin unconnected. |
| GND | 4 | 4 | Ground | |
| LBI | 9 | 9 | I | Low-battery detector input. A low battery warning is generated at LBO when the voltage on LBI drops below the threshold of 500 mV. Connect LBI to GND or VBAT if the low-battery detector function is not used. Do not leave this pin floating. |
| LBO | 10 | 10 | O | Open-drain low-battery detector output. This pin is pulled low if the voltage on LBI drops below the threshold of 500 mV. A pullup resistor must be connected between LBO and VOUT. |
| SW | 7 | 7 | I | Switch input pin. The inductor is connected to this pin. |
| VBAT | 6 | 6 | I | Supply pin |
| VOUT | 5 | 5 | O | Output voltage. Internal resistor divider sets regulated output voltage in fixed output voltage versions. |
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Input voltage | VBAT, VOUT, EN, LBI, FB, ADEN | –0.3 | 3.6 | V |
| SW | –0.3 | 7 | V | |
| Voltage | LBO, COMP | –0.3 | 3.6 | V |
| Operating free-air temperature range, TA | –40 | 85 | °C | |
| Maximum junction temperature, TJ | 150 | °C | ||
| Storage temperature range, Tstg | –65 | 150 | °C | |
7.2 ESD Ratings
| VALUEMAX | UNIT | |||
|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) | ±2000 | V |
| Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) | ±1000 | |||
7.3 Recommended Operating Conditions
| MIN | NOM | MAX | UNIT | ||
|---|---|---|---|---|---|
| VI | Supply voltage at VBAT | 0.8 | VOUT | V | |
| IO | Maximum output current at VIN = 1.2 V | 100 | mA | ||
| IO | Maximum output current at VIN = 2.4 V | 200 | mA | ||
| L1 | Inductor | 10 | 33 | µH | |
| CI | Input capacitor | 10 | µF | ||
| Co | Output capacitor | 10 | 22 | 47 | µF |
| TJ | Operating virtual junction temperature | –40 | 125 | °C | |
7.4 Thermal Information
| THERMAL METRIC(1) | TPS6101x | TPS61010 | UNIT | |
|---|---|---|---|---|
| DGS | DRC | |||
| 10 PINS | ||||
| RθJA | Junction-to-ambient thermal resistance | 161.8 | 43.1 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 36.3 | 67.4 | |
| RθJB | Junction-to-board thermal resistance | 82.7 | 18.1 | |
| ψJT | Junction-to-top characterization parameter | 1.3 | 1.6 | |
| ψJB | Junction-to-board characterization parameter | 81.1 | 18.2 | |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | 5.2 | |
7.5 Electrical Characteristics
over recommended operating free-air temperature range, VBAT = 1.2 V, EN = VBAT (unless otherwise noted)| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
|---|---|---|---|---|---|---|---|
| VI | Minimum input voltage for start-up | RL = 33 Ω | 0.85 | 0.9 | V | ||
| RL = 3 kΩ, TA = 25 °C | 0.8 | ||||||
| Input voltage once started | IO = 100 mA | 0.8 | |||||
| VO | Programmable output voltage range |
TPS61010, IOUT = 100 mA | 1.5 | 3.3 | V | ||
| Output voltage | TPS61011, 0.8 V < VI < VO, IO = 0 to 100 mA | 1.45 | 1.5 | 1.55 | V | ||
| TPS61012, 0.8 V < VI < VO, IO = 0 to 100 mA | 1.74 | 1.8 | 1.86 | ||||
| TPS61013, 0.8 V < VI < VO, IO = 0 to 100 mA | 2.42 | 2.5 | 2.58 | V | |||
| TPS61013, 1.6 V < VI < VO, IO = 0 to 200 mA | 2.42 | 2.5 | 2.58 | V | |||
| TPS61014, 0.8 V < VI < VO, IO = 0 to 100 mA | 2.72 | 2.8 | 2.88 | V | |||
| TPS61014, 1.6 V < VI < VO, IO = 0 to 200 mA | 2.72 | 2.8 | 2.88 | V | |||
| TPS61015, 0.8 V < VI < VO, IO = 0 to 100 mA | 2.9 | 3.0 | 3.1 | V | |||
| TPS61015, 1.6 V < VI < VO, IO = 0 to 200 mA | 2.9 | 3.0 | 3.1 | V | |||
| TPS61016, 0.8 V < VI < VO, IO = 0 to 100 mA | 3.2 | 3.3 | 3.4 | V | |||
| TPS61016, 1.6 V < VI < VO, IO = 0 to 200 mA | 3.2 | 3.3 | 3.4 | V | |||
| IO | Maximum continuous output current | VI > 0.8 V | 100 | mA | |||
| VI > 1.8 V | 250 | ||||||
| I(SW) | Switch current limit | TPS61011, once started | 0.39 | 0.48 | A | ||
| TPS61012, once started | 0.54 | 0.56 | |||||
| TPS61013, once started | 0.85 | 0.93 | |||||
| TPS61014, once started | 0.95 | 1.01 | |||||
| TPS61015, once started | 1 | 1.06 | |||||
| TPS61016, once started | 1.07 | 1.13 | |||||
| V(FB) | Feedback voltage | 480 | 500 | 520 | mV | ||
| f | Oscillator frequency | 420 | 500 | 780 | kHz | ||
| D | Maximum duty cycle | 85% | |||||
| rDS(on) | NMOS switch on-resistance | VO = 1.5 V | 0.37 | 0.51 | Ω | ||
| PMOS switch on-resistance | 0.45 | 0.54 | |||||
| rDS(on) | NMOS switch on-resistance | VO = 3.3 V | 0.2 | 0.37 | Ω | ||
| PMOS switch on-resistance | 0.3 | 0.45 | |||||
| Line regulation (1) | VI = 1.2 V to 1.4 V, IO = 100 mA | 0.3 | %/V | ||||
| Load regulation (1) | VI = 1.2 V; IO = 50 mA to 100 mA | 0.1 | |||||
| Autodischarge switch resistance |
300 | 400 | Ω | ||||
| Residual output voltage after autodischarge | ADEN = VBAT; EN = GND | 0.4 | V | ||||
| VIL | LBI voltage threshold (2) | V(LBI) voltage decreasing | 480 | 500 | 520 | mV | |
| LBI input hysteresis | 10 | mv | |||||
| LBI input current | 0.01 | 0.03 | |||||
| VOL | LBO output low voltage | V(LBI) = 0 V, VO = 3.3 V, I(OL) = 10 µA | 0.04 | 0.2 | V | ||
| LBO output leakage current | V(LBI) = 650 mV, V(LBO) = VO | 0.03 | µA | ||||
| I(FB) | FB input bias current (TPS61010 only) | V(FB) = 500 mV | 0.01 | 0.03 | |||
| VIL | EN and ADEN input low voltage | 0.8 V < VBAT < 3.3 V | 0.2 × VBAT | V | |||
| VIH | EN and ADEN input high voltage | 0.8 V < VBAT < 3.3 V | 0.8 ×VBAT | V | |||
| EN and ADEN input current | EN and ADEN = GND or VBAT | 0.01 | 0.03 | µA | |||
| Iq | Quiescent current into pins VBAT/SW and VOUT | IL = 0 mA, VEN = VI | VBAT/SW | 31 | 46 | µA | |
| VO | 5 | 8 | |||||
| Ioff | Shutdown current from power source | VEN = 0 V, ADEN = VBAT, TA= 25°C | 1 | 3 | µA | ||
7.6 Typical Characteristics
7.6.1 Table of Graphs
| FIGURE | ||
|---|---|---|
| Maximum output current | vs Input voltage for VO = 2.5 V, 3.3 V | Figure 1 |
| vs Input voltage for VO = 1.5 V, 1.8 V | Figure 2 | |
| Efficiency | vs Output current for VI = 1.2 VVO = 1.5 V, L1 = Sumida CDR74 - 10 µH | Figure 3 |
| vs Output current for VI = 1.2 VVO = 2.5 V, L1 = Sumida CDR74 - 10 µH | Figure 4 | |
| vs Output current for VIN = 1.2 VVO = 3.3 V, L1 = Sumida CDR74 - 10 µH | Figure 5 | |
| vs Output current for VI = 2.4 VVO = 3.3 V, L1 = Sumida CDR74 - 10 µH | Figure 6 | |
| vs Input voltage for IO = 10 mA, IO = 100 mA, IO = 200 mAVO = 3.3 V, L1 = Sumida CDR74 - 10 µH | Figure 7 | |
| TPS61016, VBAT = 1.2 V, IO = 100 mA | Figure 8 | |
| Sumida CDRH6D38 - 10 µH | ||
| Sumida CDRH5D18 - 10 µH | ||
| Sumida CDRH74 - 10 µH | ||
| Sumida CDRH74B - 10 µH | ||
| Coilcraft DS 1608C - 10 µH | ||
| Coilcraft DO 1608C - 10 µH | ||
| Coilcraft DO 3308P - 10 µH | ||
| Coilcraft DS 3316 - 10 µH | ||
| Coiltronics UP1B - 10 µH | ||
| Coiltronics UP2B - 10 µH | ||
| Murata LQS66C - 10 µH | ||
| Murata LQN6C - 10 µH | ||
| TDK SLF 7045 - 10 µH | ||
| TDK SLF 7032 - 10 µH | ||
| Output voltage | vs Output current TPS61011 | Figure 9 |
| vs Output current TPS61013 | Figure 10 | |
| vs Output current TPS61016 | Figure 11 | |
| Minimum supply start-up voltage | vs Load resistance | Figure 12 |
| No-load supply current | vs Input voltage | Figure 13 |
| Shutdown supply current | vs Input voltage | Figure 14 |
| Switch current limit | vs Output voltage | Figure 15 |
Figure 3. Efficiency vs Output Current
Figure 5. Efficiency vs Output Current
Figure 7. Efficiency vs Input Voltage
Figure 9. Output Voltage vs Output Current
Figure 11. Output Voltage vs Output Current
Figure 13. No-Load Supply Current vs Input Voltage
Figure 15. Switch Current Limit vs Output Voltage
Figure 4. Efficiency vs Output Current
Figure 6. Efficiency vs Output Current
Figure 8. Efficiency vs Inductor Type
Figure 10. Output Voltage vs Output Current
Figure 12. Minimum Start-Up Supply Voltage vs Load Resistance
Figure 14. Shutdown Supply Current vs Input Voltage
8 Parameter Measurement Information
Figure 16. Circuit Used for Typical Characteristics Measurements
9 Detailed Description
9.1 Overview
The converter is based on a fixed frequency, current mode, pulse-width-modulation (PWM) Boost converter with the synchronous rectifier built in. The device limits the current through the power switch on a pulse by pulse basis. TPS6101x enters a power save-mode at light load. In this mode, TPS6101x only switches if the output voltage trips below a set threshold voltage. It ramps up the output voltage with one or several pulses, and goes again into power save-mode once the output voltage exceeds a set threshold voltage. The load is completely isolated from the battery when the device shutdown. An auto-discharge function allows discharging the output capacitor during shutdown. The auto-discharge function is enabled if this pin is connected to VBAT, and it is disabled if ADEN is tied to GND.
9.2 Functional Block Diagram
Figure 17. Fixed Output Voltage Versions TPS61011 to TPS61016
Figure 18. Adjustable Output Voltage Version TPS61010
9.3 Feature Description
9.3.1 Controller Circuit
The device is based on a current-mode control topology using a constant frequency pulse-width modulator to regulate the output voltage. The controller limits the current through the power switch on a pulse by pulse basis. The current-sensing circuit is integrated in the device, therefore, no additional components are required. Due to the nature of the boost converter topology used here, the peak switch current is the same as the peak inductor current, which will be limited by the integrated current limiting circuits under normal operating conditions.
The control loop must be externally compensated with an R-C-C network connected to the COMP-pin.
9.3.2 Synchronous Rectifier
The device integrates an N-channel and a P-channel MOSFET transistor to realize a synchronous rectifier. There is no additional Schottky diode required. Because the device uses a integrated low rDS(on) PMOS switch for rectification, the power conversion efficiency reaches 95%.
A special circuit is applied to disconnect the load from the input during shutdown of the converter. In conventional synchronous rectifier circuits, the backgate diode of the high-side PMOS is forward biased in shutdown and allows current flowing from the battery to the output. This device, however, uses a special circuit to disconnect the backgate diode of the high-side PMOS and so, disconnects the output circuitry from the source when the regulator is not enabled (EN = low).
The benefit of this feature for the system design engineer, is that the battery is not depleted during shutdown of the converter. So, no additional effort has to be made by the system designer to ensure disconnection of the battery from the output of the converter. Therefore, design performance will be increased without additional costs and board space.
9.3.3 Power-Save Mode
The TPS61010 is designed for high efficiency over a wide output current range. Even at light loads, the efficiency stays high because the switching losses of the converter are minimized by effectively reducing the switching frequency. The controller enters a powersave-mode if certain conditions are met. In this mode, the controller only switches on the transistor if the output voltage trips below a set threshold voltage. It ramps up the output voltage with one or several pulses, and goes again into powersave-mode once the output voltage exceeds a set threshold voltage.
9.3.4 Device Enable
The device is shut down when EN is set to GND. In this mode, the regulator stops switching, all internal control circuitry including the low-battery comparator, is switched off, and the load is disconnected from the input (as described above in the synchronous rectifier section). This also means that the output voltage may drop below the input voltage during shutdown.
The device is put into operation when EN is set high. During start-up of the converter, the duty cycle is limited in order to avoid high peak currents drawn from the battery. The limit is set internally by the current limit circuit and is proportional to the voltage on the COMP-pin.
9.3.5 Undervoltage Lockout (UVLO)
The UVLO function prevents the device from starting up if the supply voltage on VBAT is lower than approximately 0.7 V. This UVLO function is implemented in order to prevent the malfunctioning of the converter. When in operation and the battery is being discharged, the device will automatically enter the shutdown mode if the voltage on VBAT drops below approximately 0.7 V.
9.3.6 Autodischarge
The autodischarge function is useful for applications where the supply voltage of a μC, μP, or memory has to be removed during shutdown in order to ensure a defined state of the system.
The autodischarge function is enabled when the ADEN is set high, and is disabled when the ADEN is set to GND. When the autodischarge function is enabled, the output capacitor will be discharged after the device is shut down by setting EN to GND. The capacitors connected to the output are discharged by an integrated switch of 300 Ω, hence the discharge time depends on the total output capacitance. The residual voltage on VOUT is less than 0.4 V after autodischarge.
9.3.7 Low-Battery Detector Circuit (LBI and LBO)
The low-battery detector circuit is typically used to supervise the battery voltage and to generate an error flag when the battery voltage drops below a user-set threshold voltage. The function is active only when the device is enabled. When the device is disabled, the LBO-pin is high impedance. The LBO-pin goes active low when the voltage on the LBI-pin decreases below the set threshold voltage of 500 mV ±15 mV, which is equal to the internal reference voltage. The battery voltage, at which the detection circuit switches, can be programmed with a resistive divider connected to the LBI-pin. The resistive divider scales down the battery voltage to a voltage level of 500 mV, which is then compared to the LBI threshold voltage. The LBI-pin has a built-in hysteresis of 10 mV. See the application section for more details about the programming of the LBI-threshold.
If the low-battery detection circuit is not used, the LBI-pin should be connected to GND (or to VBAT) and the LBO-pin can be left unconnected. Do not let the LBI-pin float.
9.3.8 Antiringing Switch
The device integrates a circuit that removes the ringing that typically appears on the SW-node when the converter enters the discontinuous current mode. In this case, the current through the inductor ramps to zero and the integrated PMOS switch turns off to prevent a reverse current from the output capacitors back to the battery. Due to remaining energy that is stored in parasitic components of the semiconductors and the inductor, a ringing on the SW pin is induced. The integrated antiringing switch clamps this voltage internally to VBAT and therefore, dampens this ringing.
9.3.9 Adjustable Output Voltage
The devices with fixed output voltages are trimmed to operate with an output voltage accuracy of ±3%.
The accuracy of the adjustable version is determined by the accuracy of the internal voltage reference, the controller topology, and the accuracy of the external resistor. The reference voltage has an accuracy of ±4% over line, load, and temperature. The controller switches between fixed frequency and pulse-skip mode, depending on load current. This adds an offset to the output voltage that is equivalent to 1% of VO. The tolerance of the resistors in the feedback divider determine the total system accuracy.
9.4 Device Functional Modes
Table 1. TPS6101x Operation Modes
| MODE | DESCRIPTION | CONDITION |
|---|---|---|
| PWM | Boost in normal switching operation | Heavy load |
| PFM | Boost in power save operation | Light load |
10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
10.1 Application Information
The devices are designed to operate from an input voltage supply range between 0.9 V and 3.3 V with a maximum switch current limit up to 1300mA. The devices operate in PWM mode from the medium to heavy load conditions and in power save mode at light load condition. In PWM mode the TPS6101x converter operates with the nominal switching frequency of 500kHz. As the load current decreases, the converter enters power save mode, reducing the switching frequency and minimizing the IC quiescent current to achieve high efficiency over the entire load current range.
10.2 Typical Applications
10.2.1 1.8-mm Maximum Height Power Supply With Single Battery Cell Input Using Low Profile Components
Figure 19. 1.8-mm Maximum Height Power Supply With Single Battery Cell Input Using Low Profile Components Schematic
10.2.1.1 Design Requirements
Use the following typical application design procedure to select external components values for the TPS6101x device.
Table 2. TPS61010 3.3 V Output Design Parameters
| DESIGN PARAMETERS | EXAMPLE VALUES |
|---|---|
| Input Voltage Range | 0.9 V to 3.3 V |
| Output Voltage | 3.3 V |
| Output Voltage Ripple | ±3% VOUT |
| Transient Response | ±10% VOUT |
| Input Voltage Ripple | ±200 mV |
| Output Current Rating | 200 mA |
| Operating Frequency | 500 kHz |
10.2.1.2 Detailed Design Procedure
The TPS6101x boost converter family is intended for systems that are powered by a single-cell NiCd or NiMH battery with a typical terminal voltage between 0.9 V to 1.6 V. It can also be used in systems that are powered by two-cell NiCd or NiMH batteries with a typical stack voltage between 1.8 V and 3.2 V. Additionally, single- or dual-cell, primary and secondary alkaline battery cells can be the power source in systems where the TPS6101x is used.
10.2.1.2.1 Programming the TPS61010 Adjustable Output Voltage Device
The output voltage of the TPS61010 can be adjusted with an external resistor divider. The typical value of the voltage on the FB pin is 500 mV in fixed frequency operation and 485 mV in the power-save operation mode. The maximum allowed value for the output voltage is 3.3 V. The current through the resistive divider should be about 100 times greater than the current into the FB pin. The typical current into the FB pin is 0.01 µA, and the voltage across R4 is typically 500 mV. Based on those two values, the recommended value for R4 is in the range of 500 kΩ in order to set the divider current at 1 µA. From that, the value of resistor R3, depending on the needed output voltage (VO), can be calculated using Equation 1.
If, as an example, an output voltage of 2.5 V is needed, a 2-MΩ resistor should be chosen for R3.
Figure 20. Typical Application Circuit for Adjustable Output Voltage Option
The output voltage of the adjustable output voltage version changes with the output current. Due to device-internal ground shift, which is caused by the high switch current, the internal reference voltage and the voltage on the FB pin increases with increasing output current. Since the output voltage follows the voltage on the FB pin, the output voltage rises as well with a rate of 1 mV per 1-mA output current increase. Additionally, when the converter goes into pulse-skip mode at output currents around 5 mA and lower, the output voltage drops due to the hysteresis of the controller. This hysteresis is about 15 mV, measured on the FB pin.
10.2.1.2.2 Programming the Low Battery Comparator Threshold Voltage
The current through the resistive divider should be about 100 times greater than the current into the LBI pin. The typical current into the LBI pin is 0.01 µA, the voltage across R2 is equal to the reference voltage that is generated on-chip, which has a value of 500 mV ±15 mV. The recommended value for R2 is therefore in the range of 500 kΩ. From that, the value of resistor R1, depending on the desired minimum battery voltage VBAT, can be calculated using Equation 2.
For example, if the low-battery detection circuit should flag an error condition on the LBO output pin at a battery voltage of 1 V, a resistor in the range of 500 kΩ should be chosen for R1. The output of the low battery comparator is a simple open-drain output that goes active low if the battery voltage drops below the programmed threshold voltage on LBI. The output requires a pullup resistor with a recommended value of 1 MΩ, and should only be pulled up to the VO. If not used, the LBO pin can be left floating or tied to GND.
10.2.1.2.3 Inductor Selection
A boost converter normally requires two main passive components for storing energy during the conversion. A boost inductor is required and a storage capacitor at the output. To select the boost inductor, it is recommended to keep the possible peak inductor current below the current limit threshold of the power switch in the chosen configuration. For example, the current limit threshold of the TPS61010's switch is 1100 mA at an output voltage of 3.3 V. The highest peak current through the inductor and the switch depends on the output load, the input (VBAT), and the output voltage (VO). Estimation of the maximum average inductor current can be done using Equation 3.
For example, for an output current of 100 mA at 3.3 V, at least 515-mA of current flows through the inductor at a minimum input voltage of 0.8 V.
The second parameter for choosing the inductor is the desired current ripple in the inductor. Normally, it is advisable to work with a ripple of less than 20% of the average inductor current. A smaller ripple reduces the magnetic hysteresis losses in the inductor, as well as output voltage ripple and EMI. But in the same way, regulation time at load changes rises. In addition, a larger inductor increases the total system costs.
With those parameters, it is possible to calculate the value for the inductor by using Equation 4.
Parameter 7 is the switching frequency and Δ IL is the ripple current in the inductor, that is, 20% × IL.
In this example, the desired inductor has the value of 12 µH. With this calculated value and the calculated currents, it is possible to choose a suitable inductor. Care must be taken that load transients and losses in the circuit can lead to higher currents as estimated in Equation 3. Also, the losses in the inductor caused by magnetic hysteresis losses and copper losses are a major parameter for total circuit efficiency.
The following inductor series from different suppliers were tested. All work with the TPS6101x converter within their specified parameters:
Table 3. Recommended Inductors
| VENDOR | RECOMMENDED INDUCTOR SERIES |
|---|---|
| Sumida | Sumida CDR74B |
| Sumida CDRH74 | |
| Sumida CDRH5D18 | |
| Sumida CDRH6D38 | |
| Coilcraft | Coilcraft DO 1608C |
| Coilcraft DS 1608C | |
| Coilcraft DS 3316 | |
| Coilcraft DT D03308P | |
| Coiltronics | Coiltronics UP1B |
| Coiltronics UP2B | |
| Murata | Murata LQS66C |
| Murata LQN6C | |
| TDK | TDK SLF 7045 |
| TDK SLF 7032 |
10.2.1.2.4 Capacitor Selection
The major parameter necessary to define the output capacitor is the maximum allowed output voltage ripple of the converter. This ripple is determined by two parameters of the capacitor, the capacitance and the ESR. It is possible to calculate the minimum capacitance needed for the defined ripple, supposing that the ESR is zero, by using Equation 5.
Parameter f is the switching frequency and ΔV is the maximum allowed ripple.
With a chosen ripple voltage of 15 mV, a minimum capacitance of 10 µF is needed. The total ripple is larger due to the ESR of the output capacitor. This additional component of the ripple can be calculated using Equation 6.
An additional ripple of 30 mV is the result of using a tantalum capacitor with a low ESR of 300 mΩ. The total ripple is the sum of the ripple caused by the capacitance and the ripple caused by the ESR of the capacitor. In this example, the total ripple is 45 mV. It is possible to improve the design by enlarging the capacitor or using smaller capacitors in parallel to reduce the ESR or by using better capacitors with lower ESR, like ceramics. For example, a 10 µF ceramic capacitor with an ESR of 50 mΩ is used on the evaluation module (EVM). Tradeoffs must be made between performance and costs of the converter circuit.
A 10-µF input capacitor is recommended to improve transient behavior of the regulator. A ceramic capacitor or a tantalum capacitor with a 100 nF ceramic capacitor in parallel placed close to the IC is recommended.
10.2.1.2.5 Compensation of the Control Loop
An R/C/C network must be connected to the COMP pin in order to stabilize the control loop of the converter. Both the pole generated by the inductor L1 and the zero caused by the ESR and capacitance of the output capacitor must be compensated. The network shown in Figure 21 satisfies these requirements.
Figure 21. Compensation of Control Loop
Resistor RC and capacitor CC2 depend on the chosen inductance. For a 10 µH inductor, the capacitance of CC2 should be chosen to 10 nF, or in other words, if the inductor is XX µH, the chosen compensation capacitor should be XX nF, the same number value. The value of the compensation resistor is then chosen based on the requirement to have a time constant of 1 ms, for the R/C network RC and CC2, hence for a 33 nF capacitor, a 33 kΩ resistor should be chosen for RC.
Capacitor CC1 depends on the ESR and capacitance value of the output capacitor, and on the value chosen for RC. Its value is calculated using Equation 7.
For a selected output capacitor of 22 µF with an ESR of 0.2Ω , an RC of 33 kΩ, the value of CC1 is in the range of 100 pF.
Table 4. Recommended Compensation Components
| INDUCTOR [µH] | OUTPUT CAPACITOR | RC [kΩ] | CC1 [pF] | CC2 [nF] | |
|---|---|---|---|---|---|
| CAPACITANCE [µF] | ESR [Ω] | ||||
| 33 | 22 | 0.2 | 33 | 120 | 33 |
| 22 | 22 | 0.3 | 47 | 150 | 22 |
| 10 | 22 | 0.4 | 100 | 100 | 10 |
| 10 | 10 | 0.1 | 100 | 10 | 10 |
10.2.1.3 Application Curves
Figure 22. Output Voltage Ripple in Continuous Mode
Figure 24. Load Transient Response
Figure 26. Converter Start-Up Time After Enable
Figure 23. Output Voltage Ripple in Discontinuous Mode
Figure 25. Line Transient Response
10.2.2 250-mA Power Supply With Two Battery Cell Input
TPS6101x application schematic of 2 Cell AA Battery Input and >250-mA output current.
Figure 27. 250-mA Power Supply With Two Battery Cell Input
10.2.3 Dual Output Voltage Power Supply for DSPs
TPS6101x application schematic with 3.3Vout of I/O supply and post LDO 1.5Vout of DSP core supply.
Figure 28. Dual Output Voltage Power Supply for DSPs
10.2.4 Power Supply With Auxiliary Positive Output Voltage
TPS6101x application schematic of 3.3Vout and 6Vout with charge pump.
Figure 29. Power Supply With Auxiliary Positive Output Voltage
10.2.5 Power Supply With Auxiliary Negative Output Voltage
TPS6101x application schematic of 3.3Vout and -2.7Vout with charge pump.
Figure 30. Power Supply With Auxiliary Negative Output Voltage
10.2.6 TPS6101x EVM Circuit Diagram
TPS6101x application schematic of the standard EVM configuration.
Figure 31. TPS6101x EVM Circuit Diagram
