13.1 Layout Guidelines

As for all switching power supplies, the layout is an important step in the design, especially at high peak currents and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground tracks. Use a common ground node for power ground and a different one for control ground to minimize the effects of ground noise. Connect these ground nodes at any place close to one of the ground pins of the IC. The most critical current path for all boost converters is from the switching FET, through the synchronous FET, then the output capacitors, and back to ground of the switching FET. Therefore, both output capacitors and their traces should be placed on the same board layer as close as possible between the IC’s VOUT and PGND pin. Especially at output voltages above 4.5 V, adding an RC snubber from the SW pin to PGND pin may assist in further reducing the parasitic inductance impact of this critical current path. Refer to the application report (SLVA255) for details of implementing a snubber. In addition, the input capacitor should be placed as close as possible between the IC’s VBAT and PGND pin. Placing the inductor close to the SW pin with a wide but short trace helps to improve efficiency and minimize EMI. To lay out the control ground, it is recommended to use short traces as well, separated from the power ground traces. This avoids ground shift problems that can occur due to superimposition of power ground current and control ground current. The recommended layout is shown in Layout Example.

13.2 Layout Example

Figure 28. PCB Layout Recommendation

13.3 Thermal Considerations

Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added heat sinks and convection surfaces, and the presence of other heat-generating components affect the power-dissipation limits of a given component.

Three basic approaches for enhancing thermal performance are listed below.

• Improving the power dissipation capability of the PCB design
• Improving the thermal coupling of the component to the PCB
• Introducing airflow in the system

The maximum recommended junction temperature (T_J) of the TPS6102x devices is 125°C. The thermal resistance of the 10-pin VSON 3 × 3 package (DRC) is R_ΘJA = 47.2°C/W, if the PowerPAD is soldered. Specified regulator operation is assured to a maximum ambient temperature T_A of 85°C. Therefore, the maximum power dissipation is about 847 mW. More power can be dissipated if the maximum ambient temperature of the application is lower.

Equation 8.