SLVSA31A November   2009  – December 2014 TPS61029-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
  9. 9 Typical Characteristics
  10. 10Parameter Measurement Information
  11. 11Detailed Description
    1. 11.1 Functional Block Diagram (TPS61029)
    2. 11.2 Feature Description
      1. 11.2.1 Controller Circuit
        1. 11.2.1.1 Synchronous Rectifier
        2. 11.2.1.2 Down Regulation
        3. 11.2.1.3 Device Enable
        4. 11.2.1.4 Softstart and Short Circuit Protection
        5. 11.2.1.5 Low Battery Detector Circuit—LBI/LBO
        6. 11.2.1.6 Low-EMI Switch
    3. 11.3 Device Functional Modes
      1. 11.3.1 Undervoltage Lockout
      2. 11.3.2 Power Save Mode
    4. 11.4 Programming
      1. 11.4.1 Programming the Output Voltage
      2. 11.4.2 Programming the LBI/LBO Threshold Voltage
  12. 12Application and Implementation
    1. 12.1 Application Information
      1. 12.1.1 Application Examples
    2. 12.2 Typical Application
      1. 12.2.1 Design Requirements
        1. 12.2.1.1 Inductor Selection
        2. 12.2.1.2 Input Capacitor
        3. 12.2.1.3 Output Capacitor
      2. 12.2.2 Detailed Design Procedure
        1. 12.2.2.1 Small Signal Stability
        2. 12.2.2.2 Thermal Information
      3. 12.2.3 Application Curves
  13. 13Power Supply Recommendations
  14. 14Layout
    1. 14.1 Layout Guidelines
    2. 14.2 Layout Example
  15. 15Device and Documentation Support
    1. 15.1 Documentation Support
      1. 15.1.1 Third-Party Products Disclaimer
    2. 15.2 Related Links
    3. 15.3 Trademarks
    4. 15.4 Electrostatic Discharge Caution
    5. 15.5 Glossary
  16. 16Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DPN|10
  • DRC|10
サーマルパッド・メカニカル・データ
発注情報

8 Specifications

8.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
Input voltage range SW, VOUT, LBO, VBAT, PS, EN, FB, LBI –0.3 7 V
TJ Operating virtual junction temperature range –40 150 °C
Tstg Storage temperature range –65 150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

8.2 ESD Ratings

VALUE UNIT
TPS61025-Q1, TPS61027-Q1, and TPS61029-Q1 in DRC package
V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±2000 V
Charged-device model (CDM), per AEC Q100-011 All pins except EN, GND, VBAT, and PGND ±500
Corner pins (EN, GND, VBAT, and PGND) ±750
TPS61029-Q1 in DPN package
V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±2000 V
Charged-device model (CDM), per AEC Q100-011 All pins except EN, GND, VBAT, and PGND ±500
Corner pins (EN, GND, VBAT, and PGND) ±750
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

8.3 Recommended Operating Conditions

MIN MAX UNIT
Supply voltage at VBAT, VI (TPS61025, TPS61027) 0.9 6.5 V
Supply voltage at VBAT, VI (TPS61029) 0.9 5.5 V
Operating virtual junction temperature range, TJ –40 125 °C

8.4 Thermal Information

THERMAL METRIC(1) DRC DPN UNIT
10 PINS 10 PINS
RθJA Junction-to-ambient thermal resistance 47.2 47.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 67.5 58.3
RθJB Junction-to-board thermal resistance 21.6 22.4
ψJT Junction-to-top characterization parameter 1.7 0.9
ψJB Junction-to-board characterization parameter 21.8 22.5
RθJC(bot) Junction-to-case (bottom) thermal resistance 3.6 4.5
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

8.5 Electrical Characteristics

Over recommended junction temperature range with TA = TJ = –40°C to 125°C and over recommended input voltage range ,(typical at an ambient temperature range of 25°C) (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DC/DC STAGE
VI Minimum input voltage for start-up RL = 120 Ω 0.9 1.2 V
Input voltage range, after start-up
(TPS61025, TPS61027)		 0.9 6.5 V
Input voltage range, after start-up (TPS61029) 0.9 5.5 V
VO Output voltage range (TPS61029) 1.8 5.5 V
VFB Feedback voltage (TPS61025, TPS61027) 490 500 510 mV
f Oscillator frequency 480 600 720 kHz
ISW Switch current limit (TPS61025, TPS61027) VOUT = 3.3 V 1200 1500 1800 mA
ISW Switch current limit (TPS61029) VOUT = 3.3 V 1500 1800 2100 mA
Start-up current limit 0.4 x ISW mA
SWN switch on resistance VOUT = 3.3 V 260 mΩ
SWP switch on resistance VOUT = 3.3 V 290 mΩ
Total accuracy (including line and load regulation) ±3%
Line regulation 0.6%
Load regulation 0.6%
Quiescent current VBAT IO = 0 mA, VEN = VBAT = 1.2 V,
VOUT = 3.3 V, TA = 25°C		 1 3 µA
VOUT 25 45 µA
Shutdown current VEN = 0 V, VBAT = 1.2 V,
TA = 25°C		 0.1 1 µA
CONTROL STAGE
VUVLO Undervoltage lockout threshold VLBI voltage decreasing 0.8 V
VIL LBI voltage threshold VLBI voltage decreasing 490 500 510 mV
LBI input hysteresis 10 mV
LBI input current EN = VBAT or GND 0.01 0.1 µA
VOL LBO output low voltage VO = 3.3 V, IOI = 100 µA 0.04 0.4 V
Vlkg LBO output leakage current VLBO = 7 V 0.01 0.1 µA
VIL EN, PS input low voltage 0.2 × VBAT V
VIH EN, PS input high voltage 0.8 × VBAT V
EN, PS input current Clamped on GND or VBAT 0.01 0.1 µA
Overtemperature protection 140 °C
Overtemperature hysteresis 20 °C