JAJSL22F June   2015  – September 2021 TPS61098 , TPS610981 , TPS610982 , TPS610985 , TPS610986 , TPS610987

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Boost Controller Operation
      2. 8.3.2 Pass-Through Operation
      3. 8.3.3 LDO / Load Switch Operation
      4. 8.3.4 Start Up and Power Down
      5. 8.3.5 Over Load Protection
      6. 8.3.6 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation Modes by MODE Pin
        1. 8.4.1.1 Active Mode
        2. 8.4.1.2 Low Power Mode
      2. 8.4.2 Burst Mode Operation under Light Load Condition
      3. 8.4.3 Pass-Through Mode Operation
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 VMAIN to Power MCU and VSUB to Power Subsystem
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Device Choice
          2. 9.2.1.2.2 Maximum Output Current
          3. 9.2.1.2.3 Inductor Selection
          4. 9.2.1.2.4 Capacitor Selection
          5. 9.2.1.2.5 Control Sequence
        3. 9.2.1.3 Application Curves
      2. 9.2.2 VMAIN to Power the System in Low Power Mode
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
      3. 9.2.3 VSUB to Power the System in Active Mode
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
        3. 9.2.3.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 サポート・リソース
    5. 12.5 Trademarks
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 用語集
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3 Recommended Operating Conditions

MINNOMMAXUNIT
VINInput voltage range0.74.5V
V(MAIN)Boost converter output voltage range2.24.3V
V(SUB)Load switch / LDO outut voltage range1.83.7V
LEffective inductance range1.544.76.11µH
CBATEffective input capacitance range at input(1)5µF
CO1Effective output capacitance range at VMAIN pin for boost converter output(1)51022µF
CO2Effective output capacitance range at VSUB pin for LDO output(1)1(2)510µF
Effective output capacitance range at VSUB pin for load switch output(1)(3)12.2µF
TJOperating virtual junction temperature–40125°C
(1) Effective value. Ceramic capacitor’s derating effect under bias should be considered. Choose the right nominal capacitance by checking capacitor DC bias characteristics.
(2) If LDO output current is lower than 20 mA, the minimum effective output capacitance value can be lower to 0.5 µF.
(3) With load switch version, the output capacitor at VSUB pin is only required if smaller voltage ripple is needed.