JAJS402C March   2009  – July 2016 TPS61160A , TPS61161A

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Dissipation Ratings
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Soft Start-Up
      2. 7.3.2 Open LED Protection
      3. 7.3.3 Shutdown
      4. 7.3.4 Current Program
      5. 7.3.5 PWM Brightness Dimming
      6. 7.3.6 Undervoltage Lockout
      7. 7.3.7 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation with CTRL
      2. 7.4.2 External PWM Dimming
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Typical Application of TPS61161A
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Maximum Output Current
          2. 8.2.1.2.2 Inductor Selection
          3. 8.2.1.2.3 Schottky Diode Selection
          4. 8.2.1.2.4 Compensation Capacitor Selection
          5. 8.2.1.2.5 Input and Output Capacitor Selection
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Li-Ion Driver for 6 White LEDs
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Choosing Component Values
        3. 8.2.2.3 Application Curves
      3. 8.2.3 Li-Ion Driver for 6 White LEDs With External PWM Dimming Network
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curves
      4. 8.2.4 Li-Ion Driver for 8 White LEDs
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Detailed Design Procedure
        3. 8.2.4.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 関連リンク
    4. 11.4 ドキュメントの更新通知を受け取る方法
    5. 11.5 コミュニティ・リソース
    6. 11.6 商標
    7. 11.7 静電気放電に関する注意事項
    8. 11.8 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VI Supply voltages on VIN(2) –0.3 20 V
Voltages on CTRL(2) –0.3 20 V
Voltage on FB and COMP(2) –0.3 3 V
Voltage on SW(2) –0.3 40 V
PD Continuous power dissipation See Dissipation Ratings
TJ Operating junction temperature –40 150 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.

6.2 ESD Ratings

MIN MAX UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) 4000 V
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) 1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

MIN NOM MAX UNIT
VI Input voltage, VIN 2.7 18 V
VO Output voltage VIN 38 V
L Inductor(1) 10 22 μH
fdim PWM dimming frequency(2) 5 100 kHz
tPWM_MIN Minimum pulse width at PWM input 50 ns
CIN Input capacitor 1 μF
CO Output capacitor(1) 0.47 10 μF
TA Operating ambient temperature –40 85 °C
TJ Operating junction temperature –40 125 °C
(1) These values are recommended values that have been successfully tested in several applications. Other values may be acceptable in other applications but should be fully tested by the user.
(2) The device can support the frequency range from 1 kHz to 5 kHz, based on the specification, toff . The output ripple needs to be considered in the range of 1 kHz to 5 kHz.

6.4 Thermal Information

THERMAL METRIC(1) TPS61160A, TPS61161A UNIT
DRV (WSON)
6 PINS
RθJA Junction-to-ambient thermal resistance 140 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 20
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Dissipation Ratings

BOARD PACKAGE RθJC RθJA DERATING FACTOR ABOVE TA = 25°C TA < 25°C TA = 70°C TA = 85°C
Low-K(1)DRV 20°C/W 140°C/W 7.1 mW/°C 715 mW 395 mW 285 mW
High-K (2)DRV 20°C/W 65°C/W 15.4 mW/°C 1540 mW 845 mW 615 mW
(1) The JEDEC low-K (1s) board used to derive this data was a 3 in × 3 in, two-layer board with 2-ounce copper traces on top of the board.
(2) The JEDEC high-K (2s2p) board used to derive this data was a 3 in × 3 in, multilayer board with 1-ounce internal power and ground planes and 2-ounce copper traces on top and bottom of the board.

6.6 Electrical Characteristics

VIN = 3.6 V, CTRL = VIN; for Min/Max values TA = –40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENT
VI Input voltage range, VIN 2.7 18 V
IQ Operating quiescent current into VIN Device PWM switching no load 1.8 mA
ISD Shutdown current CRTL = GND, VIN = 4.2 V 1 μA
UVLO Undervoltage lockout threshold VIN falling 2.2 2.5 V
Vhys Undervoltage lockout hysteresis 70 mV
ENABLE AND REFERENCE CONTROL
V(CTRLh) CTRL logic high voltage VIN = 2.7 V to 18 V 1.2 V
V(CTRLl) CTRL logic low voltage VIN = 2.7 V to 18 V 0.4 V
R(CTRL) CTRL pull down resistor 400 800 1600 kΩ
toff CTRL pulse width to shutdown CTRL high to low 2.5 ms
VOLTAGE AND CURRENT CONTROL
VREF Voltage feedback regulation voltage 196 200 204 mV
V(REF_PWM) Voltage feedback regulation voltage under brightness control VFB = 50 mV 47 50 53 mV
VFB = 20 mV 17 20 23
IFB Voltage feedback input bias current VFB = 200 mV 2 μA
fS Oscillator frequency 500 600 700 kHz
Dmax Maximum duty cycle VFB = 100 mV 90% 93%
tmin_on Minimum on pulse width 40 ns
Isink Comp pin sink current 100 μA
Isource Comp pin source current 100 μA
Gea Error amplifier transconductance 240 320 400 μmho
Rea Error amplifier output resistance 6 MΩ
fea Error amplifier crossover frequency 5 pF connected to COMP 500 kHz
POWER SWITCH
RDS(on) N-channel MOSFET on-resistance VIN = 3.6 V 0.3 0.6 Ω
VIN = 3 V 0.7
ILN_NFET N-channel leakage current VSW = 35 V, TA = 25°C 1 μA
OC and OLP
ILIM N-Channel MOSFET current limit D = Dmax 0.56 0.7 0.84 A
ILIM_Start Start up current limit D = Dmax 0.4 A
tHalf_LIM Time step for half current limit 5 ms
Vovp Open LED protection threshold Measured on the SW pin, TPS61160A
TPS61161A
25
37
26
38
27
39		 V
V(FB_OVP) Open LED protection threshold on FB Measured on the FB pin, percentage of Vref,
Vref = 200 mV and 20 mV		 50%
tREF VREF filter time constant 180 μs
tstep VREF ramp up time 213 μs
THERMAL SHUTDOWN
Tshutdown Thermal shutdown threshold 160 °C
Thysteresis Thermal shutdown threshold hysteresis 15 °C

6.7 Typical Characteristics

Table 1. Table of Graphs

FIGURE
Efficiency TPS61160A/61A VIN = 3.6 V; 4, 6, 8, 10 LEDs; L = 22 μH Figure 1
Efficiency TPS61160A Figure 2
Efficiency TPS61161A Figure 3
Current limit TA = 25°C Figure 4
Current limit Figure 5
PWM dimming linearity VIN = 3.6 V; PWM Freq = 10 kHz and 40 kHz Figure 6
Output ripple at PWM dimming 8 LEDs; VIN = 3.6 V; ILOAD = 20 mA; PWM Freq = 10 kHz Figure 7
Switching waveform 8 LEDs; VIN = 3.6 V; ILOAD = 20 mA; L = 22 μH Figure 8
Start-up 8 LEDs; VIN = 3.6 V; ILOAD = 20 mA; L =22 μH Figure 9
Open LED protection 8 LEDs; VIN = 3.6 V; ILOAD = 20 mA; L = 22 μH Figure 10
TPS61160A TPS61161A eff_io_lvs791.gif Figure 1. Efficiency vs Output Current
TPS61160A TPS61161A eff3_io_lvs937.gif Figure 3. Efficiency vs Output Current
TPS61160A TPS61161A scl_ta_lvs791.gif
Figure 5. Switch Current Limit vs Temperature
TPS61160A TPS61161A scope1_col_lvs791.gif
Figure 7. Output Ripple at PWM Dimming
TPS61160A TPS61161A scope3_col_lvs791.gif
Figure 9. Start-Up
TPS61160A TPS61161A eff2_io_lvs937.gif Figure 2. Efficiency vs Output Current
TPS61160A TPS61161A scl_dc_lvs791.gif Figure 4. Switch Current Limit vs Duty Cycle
TPS61160A TPS61161A v_dc_lvs791.gif
Figure 6. FB Voltage vs PWM Duty Cycle
TPS61160A TPS61161A scope2_col_lvs791.gif
Figure 8. Switching Waveform
TPS61160A TPS61161A scope4_col_lvs791.gif
Figure 10. Open LED Protection