SLVSBM5B December   2012  – August 2015 TPS61176

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Supply Voltage
      2. 7.3.2 Boost Converter
      3. 7.3.3 Current Sinks
      4. 7.3.4 IFBx Pin Unused
      5. 7.3.5 Enable and Start-up
      6. 7.3.6 Brightness Dimming Control
    4. 7.4 Device Functional Modes
      1. 7.4.1 Dimming Modes
        1. 7.4.1.1 Analog Dimming Mode
        2. 7.4.1.2 PWM Dimming
      2. 7.4.2 Overvoltage Protection
      3. 7.4.3 Current Sink Open Protection
      4. 7.4.4 Overcurrent and Short Circuit Protection
      5. 7.4.5 Thermal Protection
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Single-Cell Battery Input Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Inductor Selection
          2. 8.2.1.2.2 Output Capacitor Selection
          3. 8.2.1.2.3 Schottky Diode Selection
          4. 8.2.1.2.4 Isolation FET Selection
          5. 8.2.1.2.5 Audible Noise Reduction
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Multi-Cell Battery Input Application
      3. 8.2.3 Combined String Application
      4. 8.2.4 Separate PWM and EN Signals Application
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

10 Layout

10.1 Layout Guidelines

As for all switching power supplies, especially those providing high current and using high switching frequencies, layout is an important design step. If layout is not carefully done, the regulator could show instability as well as EMI problems. Therefore, use wide and short traces for high current paths. The input capacitor, C1 in Figure 9, needs not only to be close to the VIN pin, but also to the GND pin in order to reduce the input ripple seen by the device. It should also be placed close to the inductor. C3 is the filter and noise decoupling capacitor for the internal linear regulator powering the internal digital circuits. It should be placed as close as possible between the VLDO and GND pins to prevent any noise insertion to the digital circuits. The SW pin carries high current with fast rising and falling edges. Therefore, the connection between the SW pin to the inductor and Schottky diode should be kept as short and wide as possible. The trace between the Schottky diode and the output capacitor C2 should also be as short and wide as possible. It is also beneficial to have the ground of the output capacitor C2 close to the PGND pin because there is a large ground return current flowing between them. When laying out signal grounds, it is recommended to use short traces separated from power ground traces, and connect them together at a single point — for example, on the thermal pad. The thermal pad needs to be soldered onto the PCB and connected to the GND pin of the device. An additional thermal via can significantly improve power dissipation of the device.

10.2 Layout Example

TPS61176 TPS61176_layout_slvsbm5.pngFigure 22. TPS61176 Layout