JAJSEX9A July   2011  – March 2018 TPS61256A

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      最小のソリューション・サイズのアプリケーション
      2.      効率と負荷電流との関係
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Softstart
    3. 8.3 Undervoltage Lockout
    4. 8.4 Thermal Regulation
    5. 8.5 Thermal Shutdown
    6. 8.6 Functional Block Diagram
    7. 8.7 Feature Description
      1. 8.7.1 Power-Save Mode
      2. 8.7.2 Current Limit Operation
      3. 8.7.3 Enable
      4. 8.7.4 Load Disconnect And Reverse Current Protection
    8. 8.8 Device Functional Modes
      1. 8.8.1 Load Disconnect And Reverse Current Protection
      2. 8.8.2 Softstart
      3. 8.8.3 Undervoltage Lockout
      4. 8.8.4 Thermal Regulation
      5. 8.8.5 Thermal Shutdown
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
          1. 9.2.2.1.1 High-frequency Converter Applications
        2. 9.2.2.2 Output Capacitor
        3. 9.2.2.3 Input Capacitor
        4. 9.2.2.4 Checking Loop Stability
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Information
  12. 12Package Summary
    1. 12.1 Package Dimensions
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 デバイス・サポート
      1. 13.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 13.2 ドキュメントの更新通知を受け取る方法
    3. 13.3 コミュニティ・リソース
    4. 13.4 商標
    5. 13.5 静電気放電に関する注意事項
    6. 13.6 Glossary
  14. 14メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • YFF|9
サーマルパッド・メカニカル・データ
発注情報

Output Capacitor

For the output capacitor, it is recommended to use small ceramic capacitors placed as close as possible to the VOUT and GND pins of the IC. If, for any reason, the application requires the use of large capacitors which can not be placed close to the IC, using a smaller ceramic capacitor in parallel to the large one is highly recommended. This small capacitor should be placed as close as possible to the VOUT and GND pins of the IC. To get an estimate of the recommended minimum output capacitance, Equation 6 can be used.

Equation 6. TPS61256A eq9_Cmin_lvsag3.gif

Where f is the switching frequency which is 3.5MHz (typ.) and ΔV is the maximum allowed output ripple.

With a chosen ripple voltage of 20mV, a minimum effective capacitance of 9μF is needed. The total ripple is larger due to the ESR of the output capacitor. This additional component of the ripple can be calculated using Equation 7

Equation 7. TPS61256A eq10_Vesr_lvsag3.gif

An MLCC capacitor with twice the value of the calculated minimum should be used due to DC bias effects. This is required to maintain control loop stability. The output capacitor requires either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors, aside from their wide variation in capacitance over temperature, become resistive at high frequencies. There are no additional requirements regarding minimum ESR. Larger capacitors cause lower output voltage ripple as well as lower output voltage drop during load transients but the total output capacitance value should not exceed ca. 50µF.

DC bias effect: high cap. ceramic capacitors exhibit DC bias effects, which have a strong influence on the device's effective capacitance. Therefore the right capacitor value has to be chosen very carefully. Package size and voltage rating in combination with material are responsible for differences between the rated capacitor value and it's effective capacitance. For instance, a 22µF X5R 6.3V 0805 MLCC capacitor would typically show an effective capacitance of less than 8µF (under 5V bias condition).