JAJSLN3B March   2021  – October 2021 TPS61379-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1  VCC Power Supply
      2. 8.3.2  Input Undervoltage Lockout (UVLO)
      3. 8.3.3  Enable and Soft Start
      4. 8.3.4  Shut Down
      5. 8.3.5  Switching Frequency Setting
      6. 8.3.6  Spread Spectrum Frequency Modulation
      7. 8.3.7  Bootstrap
      8. 8.3.8  Load Disconnect
      9. 8.3.9  MODE/SYNC Configuration
      10. 8.3.10 Overvoltage Protection (OVP)
      11. 8.3.11 Output Short Protection/Hiccup
      12. 8.3.12 Power-Good Indicator
      13. 8.3.13 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Forced PWM Mode
      2. 8.4.2 Auto PFM Mode
      3. 8.4.3 External Clock Synchronization
      4. 8.4.4 Down Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Programming the Output Voltage
        2. 9.2.2.2 Setting the Switching Frequency
        3. 9.2.2.3 Selecting the Inductor
        4. 9.2.2.4 Selecting the Output Capacitors
        5. 9.2.2.5 Selecting the Input Capacitors
        6. 9.2.2.6 Loop Stability and Compensation
          1. 9.2.2.6.1 Small Signal Model
          2. 9.2.2.6.2 Loop Compensation Design Steps
          3. 9.2.2.6.3 Selecting the Bootstrap Capacitor
          4. 9.2.2.6.4 VCC Capacitor
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 用語集
    6. 12.6 静電気放電に関する注意事項
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.2.2.1 Programming the Output Voltage

There are two ways to set the output voltage of the TPS61379-Q1: adjustable or fixed. If the resistance between FB and GND is higher than 14.4kΩ and less than 100kΩ during start-up, the TPS61379-Q1 works as an adjustable output version. The FB pin is connected to the negative input of the internal error amplifier directly. The output voltage can be programmed by adjusting the external resistor divider RUpper and RLower according to Equation 2. When the output voltage is in well regulation, the typical voltage at the FB pin is VREF of 0.8 V.

Equation 2. GUID-8FA528E1-54A5-4C4B-AD4D-C661027202F7-low.gif

For some applications where the resistor needs to be as low as possible, the low-side divider can be 20 kΩ. The reference voltage is 0.8 V, the high-side divider is 205 kΩ for 9-V output voltage.

For other applications without specific requirements on divider resistance, the user can choose RLower to be approximately 80.6 kΩ. Slightly increasing or decreasing RLower can result in closer output voltage matching when using standard values resistors.

For the best accuracy, RLower is recommended to be smaller than 100 kΩ to ensure that the current following through RLower is at least 100 times larger than FB pin leakage current. Changing RLower towards the lower value increases the robustness against noise injection. Changing the RLower to higher values reduces the quiescent current for achieving higher efficiency at light load.

If the resistance between FB and GND is less than 9.6kΩ during start-up, the TPS61379-Q1 works as a fixed output voltage version. The TPS61379-Q1 uses the internal resistor divider.

For 5-V fixed output voltage, RLower is between 0Ω and 2.4kΩ and RUpper should be removed.

For 5.25-V fixed output voltage, RLower is between 3.6kΩ and 4.8 kΩ and RUpper should be removed.

For 5.5-V fixed output voltage, RLower is between 7.2kΩ and 9.6kΩ and RUpper should be removed.