JAJS521F December   2008  – May 2019 TPS61500

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーション回路
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Switching Frequency
      2. 7.3.2 Soft Start
      3. 7.3.3 Enable and Thermal Shutdown
      4. 7.3.4 Undervoltage Lockout (UVLO)
      5. 7.3.5 Overvoltage Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 PWM Dimming Method
      2. 7.4.2 Analog Dimming Method
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Analog Dimming Method
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Programming the Overvoltage Protection
          2. 8.2.1.2.2 Programming the LED Current
          3. 8.2.1.2.3 Implementing Dimming
          4. 8.2.1.2.4 Computing the Maximum Output Current
          5. 8.2.1.2.5 Selecting the Inductor
          6. 8.2.1.2.6 Selecting the Schottky Diode
          7. 8.2.1.2.7 Selecting the Compensation Capacitor and Resistor
          8. 8.2.1.2.8 Selecting the Input and Output Capacitor
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Pure PWM Dimming Method
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
      2. 11.1.2 ドキュメントの更新通知を受け取る方法
      3. 11.1.3 コミュニティ・リソース
    2. 11.2 商標
    3. 11.3 静電気放電に関する注意事項
    4. 11.4 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.1 Overview

The TPS61500 integrates a 3-A, 40-V low side switch FET for driving up to 10 high-brightness LEDs in series. The device regulates the FB pin voltage at 200 mV with current mode pulse width modulation (PWM) control, and the LED current is sensed through a low-value resistor in series with LEDs.

The PWM control circuitry turns on the switch at the beginning of each switching cycle. The input voltage is applied across the inductor and stores the energy as inductor current ramps up. During this portion of the switching cycle, the load current is provided by the output capacitor. When the inductor current rises to the threshold set by the error amplifier output, the power switch turns off and the external Schottky diode is forward biased. The inductor transfers stored energy to replenish the output capacitor and supply the load current. This operation repeats each switching cycle. As shown in Functional Block Diagram, the duty cycle of the converter is determined by the PWM control comparator which compares the error amplifier output and the current signal. The switching frequency is programmed by the external resistor.

A ramp signal from the oscillator is added to the current ramp. This slope compensation is necessary to avoid sub-harmonic oscillation that is intrinsic to the current mode control at duty cycle higher than 50%. The feedback loop regulates the FB pin to a reference voltage through an error amplifier. The output of the error amplifier is connected to the COMP pin. An external compensation network is connected to the COMP pin to optimize the feedback loop for stability and transient response.