JAJS521F December   2008  – May 2019 TPS61500

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーション回路
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Switching Frequency
      2. 7.3.2 Soft Start
      3. 7.3.3 Enable and Thermal Shutdown
      4. 7.3.4 Undervoltage Lockout (UVLO)
      5. 7.3.5 Overvoltage Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 PWM Dimming Method
      2. 7.4.2 Analog Dimming Method
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Analog Dimming Method
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Programming the Overvoltage Protection
          2. 8.2.1.2.2 Programming the LED Current
          3. 8.2.1.2.3 Implementing Dimming
          4. 8.2.1.2.4 Computing the Maximum Output Current
          5. 8.2.1.2.5 Selecting the Inductor
          6. 8.2.1.2.6 Selecting the Schottky Diode
          7. 8.2.1.2.7 Selecting the Compensation Capacitor and Resistor
          8. 8.2.1.2.8 Selecting the Input and Output Capacitor
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Pure PWM Dimming Method
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
      2. 11.1.2 ドキュメントの更新通知を受け取る方法
      3. 11.1.3 コミュニティ・リソース
    2. 11.2 商標
    3. 11.3 静電気放電に関する注意事項
    4. 11.4 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.1.2.8 Selecting the Input and Output Capacitor

The output capacitor is selected mainly to meet the requirements for the output ripple and loop stability. This ripple voltage is related to the capacitor capacitance and its equivalent series resistance (ESR). Assuming a capacitor with zero ESR, the minimum capacitance needed for a given ripple can be calculated by

Equation 6. TPS61500 eq_cout_lvs893.gif

where

  • Vripple = peak-to-peak output ripple

The additional output ripple component caused by ESR is calculated using:

Equation 7. TPS61500 eq_vripp_lvs893.gif

Due to its low ESR, Vripple_ESR can be neglected for ceramic capacitors, but must be considered if tantalum or electrolytic capacitors are used.

Take care when evaluating a ceramic capacitor’s derating under DC bias, aging and AC signal. For example, larger form factor capacitors (in 1206 size) have their self-resonant frequencies in the range of the switching frequency; thus, the effective capacitance is significantly lower. The DC bias can also significantly reduce capacitance. Ceramic capacitors can loss as much as 50% of its capacitance at its rated voltage. Therefore, leave margin on the voltage rating to ensure adequate capacitance at the required output voltage.

TI recommends a capacitor in the range of 1 µF to 4.7 μF for input side. The output requires a capacitor in the range of 1 μF to 10 μF. The output capacitor affects the loop stability of the boost regulator. If the output capacitor is below the range, the boost regulator can potentially become unstable.

The popular vendors for high-value ceramic capacitors are: