SLVS833E March   2010  – October 2020 TPS62065 , TPS62067

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Mode Selection (TPS62065)
      2. 8.3.2 Power Good Output (TPS62067)
      3. 8.3.3 Enable
      4. 8.3.4 Clock Dithering
      5. 8.3.5 Undervoltage Lockout
      6. 8.3.6 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Soft Start
      2. 8.4.2 Power Save Mode
      3. 8.4.3 Dynamic Voltage Positioning
      4. 8.4.4 100% Duty Cycle Low Dropout Operation
      5. 8.4.5 Internal Current Limit and Fold-Back Current Limit for Short Circuit Protection
      6. 8.4.6 Output Capacitor Discharge
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Voltage Setting
        2. 9.2.2.2 Output Filter Design (Inductor and Output Capacitor)
          1. 9.2.2.2.1 Inductor Selection
          2. 9.2.2.2.2 Output Capacitor Selection
          3. 9.2.2.2.3 Input Capacitor Selection
        3. 9.2.2.3 Checking Loop Stability
      3. 9.2.3 Application Curves
    3. 9.3 System Example
      1. 9.3.1 TPS62067 Adjustable 1.8-V Output
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3.2 Power Good Output (TPS62067)

This function is available in the TPS62067. The power good output is an open-drain output and requires an external pullup resistor. The circuit is active once the device is enabled and AVIN is above the undervoltage lockout threshold VUVLO. It is driven by an internal comparator connected to the FB voltage. The PG output provides a high level once the feedback voltage exceeds typically 95% of its nominal value. The PG output is driven to low level once the feedback voltage falls below typically 90% of its nominal value. The PG output is activated with an internal delay of 5 µs.

The PG open-drain output transistor is turned on immediately with EN = Low level and pulls the output low. The external pullup resistor can be connected to any voltage rail lower or equal the voltage applied to AVIN of the device. The value of the pullup resistor must be carefully selected to limit the current into the PG pin to maximum 1 mA. The external pullup resistor can be connected to VOUT or another voltage rail which does not exceed the VIN level. The current flowing through the pullup resistor impacts the current consumption of the application circuit in shutdown mode.

The shutdown current of the device does not include the current through the external pullup and internal open-drain stage. The PG signal can be used for sequencing various converters or to reset a microcontroller.

GUID-570B08BA-08BF-4C18-AF12-B8B226CE3408-low.gifFigure 8-1 Power Good Output Pg