JAJSNC0C August   2013  – November 2021 TPS62090-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Enable and Disable (EN)
      2. 7.3.2  Soft Start (SS) and Hiccup Current Limit During Start-Up
      3. 7.3.3  Voltage Tracking (SS)
      4. 7.3.4  Short-Circuit Protection (Hiccup Mode)
      5. 7.3.5  Output Discharge Function
      6. 7.3.6  Power Good Output (PG)
      7. 7.3.7  Frequency Set Pin (FREQ)
      8. 7.3.8  Undervoltage Lockout (UVLO)
      9. 7.3.9  Thermal Shutdown
      10. 7.3.10 Charge Pump (CP, CN)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Pulse Width Modulation Operation
      2. 7.4.2 Power Save Mode Operation
      3. 7.4.3 Low-Dropout Operation (100% Duty Cycle)
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Inductor Selection
        2. 8.2.2.2 Input and Output Capacitor Selection
        3. 8.2.2.3 Setting the Output Voltage
      3. 8.2.3 Application Curves
    3. 8.3 System Examples
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3.6 Power Good Output (PG)

The power good output is low when the output voltage is below the nominal value. The power good becomes high impedance once the output is within 5% of regulation. The PG pin is an open-drain output and is specified to typically sink up to 1 mA. This output requires a pullup resistor to be monitored properly. The pullup resistor cannot be connected to any voltage higher than the input voltage of the device. The PG output is low when the device is disabled, in thermal shutdown, or in UVLO. The PG output can be left floating if unused.