JAJSNC0C
August 2013 – November 2021
TPS62090-Q1
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Enable and Disable (EN)
7.3.2
Soft Start (SS) and Hiccup Current Limit During Start-Up
7.3.3
Voltage Tracking (SS)
7.3.4
Short-Circuit Protection (Hiccup Mode)
7.3.5
Output Discharge Function
7.3.6
Power Good Output (PG)
7.3.7
Frequency Set Pin (FREQ)
7.3.8
Undervoltage Lockout (UVLO)
7.3.9
Thermal Shutdown
7.3.10
Charge Pump (CP, CN)
7.4
Device Functional Modes
7.4.1
Pulse Width Modulation Operation
7.4.2
Power Save Mode Operation
7.4.3
Low-Dropout Operation (100% Duty Cycle)
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Inductor Selection
8.2.2.2
Input and Output Capacitor Selection
8.2.2.3
Setting the Output Voltage
8.2.3
Application Curves
8.3
System Examples
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Device Support
11.1.1
Third-Party Products Disclaimer
11.2
Documentation Support
11.2.1
Related Documentation
11.3
Receiving Notification of Documentation Updates
11.4
サポート・リソース
11.5
Trademarks
11.6
Electrostatic Discharge Caution
11.7
Glossary
12
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ（パッケージ｜ピン）
RGT|16
MPQF119H
サーマルパッド・メカニカル・データ
RGT|16
QFND098S
発注情報
jajsnc0c_oa
jajsnc0c_pm
7.4
Device Functional Modes