JAJSE91A September   2017  – December 2017 TPS62097-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Terminal Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommend Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 100% Duty Cycle Mode
      2. 7.3.2 Switch Current Limit and Hiccup Short Circuit Protection
      3. 7.3.3 Under Voltage Lockout (UVLO)
      4. 7.3.4 Thermal Shutdown
    4. 7.4 Device Function Modes
      1. 7.4.1 Enable and Disable (EN)
      2. 7.4.2 Power Save Mode and Forced PWM Mode (MODE)
      3. 7.4.3 Soft Startup (SS/TR)
      4. 7.4.4 Voltage Tracking (SS/TR)
      5. 7.4.5 Power Good (PG)
  8. 8 Application Information
    1. 8.1 Application Information
    2. 8.2 1.8-V Output Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Setting the Output Voltage
        2. 8.2.2.2 Output Filter Design
        3. 8.2.2.3 Inductor Selection
        4. 8.2.2.4 Capacitor Selection
      3. 8.2.3 Application Performance Curves
  9. 9 Power Supply Recommendations
  10. 10PCB Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Information
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 11.2 コミュニティ・リソース
    3. 11.3 商標
    4. 11.4 静電気放電に関する注意事項
    5. 11.5 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • RGT|16
サーマルパッド・メカニカル・データ
発注情報

5 Terminal Configuration and Functions

RGT Package with Wettable Flanks
16-Pin VQFN
(Top View)
TPS62097-Q1 TPS62097Q_pinout.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
PGND 5,6 Power ground pin.
SW 13,14,15,16 PWR Switch pin. It is connected to the internal MOSFET switches. Connect the external inductor between this terminal and the output capacitor.
VOS 1 I Output voltage sense pin. This pin must be directly connected to the output capacitor.
FB 2 I Feedback pin. For the adjustable output voltage version, a resistor divider sets the output voltage. For the fixed output voltage versions, this pin is recommended to be connected to AGND for improved thermal performance. The pin also can be left floating as an internal 400kΩ resistor is connected between this pin and AGND for fixed output voltage versions.
PG 11 O Power good open drain output pin. The pull-up resistor should not be connected to any voltage higher than 6 V. If it's not used, leave the pin floating.
EN 12 I Enable pin. To enable the device this pin needs to be pulled high. Pulling this pin low disables the device. This pin has an internal pull-down resistor of typically 375kΩ when the device is disabled.
PVIN 7,8 PWR Power input supply pin.
AVIN 9 I Analog input supply pin. Connect it to the PVIN pin together.
SS/TR 10 I Soft startup and voltage tracking pin. A capacitor is connected to this pin to set the soft startup time. Leaving this pin floating sets the minimum startup time.
MODE 3 I Mode selection pin. Connect this pin to AGND to enable Power Save Mode with automatic transition between PWM and Power Save Mode. Connect this pin to an external resistor or leave floating to enable forced PWM mode only. See Table 1.
AGND 4 Analog ground pin.
Exposed Thermal Pad The exposed thermal pad is connected to AGND. It must be soldered for mechanical reliability.
Anchor Pins These pins do not require an electrical connection but can be connected to AGND. They must be soldered for mechanical reliability. Refer to EXAMPLE BOARD LAYOUT at the end of this data sheet.