SLVSC20E January   2015  – October 2016 TPS62134A , TPS62134B , TPS62134C , TPS62134D

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommend Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Enable and Shutdown (EN)
      2. 8.3.2 Undervoltage Lockout (UVLO)
      3. 8.3.3 Soft-Start (SS) Circuitry
      4. 8.3.4 Switch Current-Limit and Short Circuit Protection
      5. 8.3.5 Output Voltage and LPM Logic Selection (VIDx and LPM)
      6. 8.3.6 Power-Good Output (PG)
      7. 8.3.7 Single-Ended Remote Sense (FBS)
      8. 8.3.8 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 PWM Operation and Power Save Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Filter Selection
        2. 9.2.2.2 Inductor Selection
        3. 9.2.2.3 Output Capacitor
        4. 9.2.2.4 Input Capacitor
        5. 9.2.2.5 Soft-Start Capacitor
        6. 9.2.2.6 Program Output Voltage with External Resistor Divider
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Related Links
    4. 12.4 Receiving Notification of Documentation Updates
    5. 12.5 Community Resources
    6. 12.6 Trademarks
    7. 12.7 Electrostatic Discharge Caution
    8. 12.8 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Pin Configuration and Functions

RGT Package
16-Pin VQFN With Thermal Pad
Top View
TPS62134A TPS62134B TPS62134C TPS62134D TPS62134A_pinout.gif

Pin Functions

PIN TYPE DESCRIPTION
NO. NAME
1 VOS I Output voltage sense pin and connection for the control loop circuitry. The VOS pin must be connected directly at the output capacitor.
2 SW PWR This pin is a switch node and is connected to the internal MOSFET switches. Connect an inductor between the SW pin and output capacitor.
3
4 PG O Output power-good pin. The PG pin is an open drain and requires a pullup resistor. If this pin is not in use, leave it floating.
5 FBS I Output-voltage feedback pin. This pin is used for a positive remote sense of the load voltage. The FBS pin must be connected close to the load-supply node on the output bus.
6 AGND — Analog ground pin. The AGND pin must be connected directly to the exposed thermal pad and common ground plane.
7 SS O Soft-start pin. An external capacitor connected to this pin sets the soft-start time.
8 VID1 I Output-voltage selection pins (VIDx).
9 VID0
10 AVIN I Supply-voltage pin for the internal control circuitry. Connect the AVIN pin to the same source as the PVIN pin.
11 PVIN PWR Supply-voltage pins for the internal power stage.
12
13 EN I Enable and disable input pin. An internal pulldown resistor maintains logic-level low if the pin is floating.
14 LPM I Low-power-mode input pin.
15 PGND — Power ground. The PGND pin must be connected directly to the exposed thermal pad and common ground plane.
16
— Exposed Thermal Pad — The exposed thermal pad must be connected to the AGND (6) pin, PGND (15 and 16) pins, and common ground plane. The thermal pad must be soldered to achieve appropriate power dissipation and mechanical reliability.